202nd Meeting - Salt Lake City, UT
October 20-25, 2002
I1 - Copper Interconnects, New Contact Metallurgies and Low-K Interlevel Dielectrics
Dielectric Science and Technology/Electronics/Electrodeposition
Monday October 21, 2002
Grand Ballroom B, First Floor, Little America Hotel
Co-Chairs: G.S. Mathad and C. Reidsema-Simpson
||Superconformal Film Growth - T.
Moffat, D. Wheeler, B. Baker, and D. Josell (NIST)|
||Additive Behavior during Copper Electrodeposition in Acidic Solution Containing Cl-, PEG and SPS - M. Tan and J. Harb (Brigham Young University)|
||ULSI Wiring Formation by Copper Electroplating - S. Miura, K.
Oyamada, S. Watanabe, M. Sugimoto, H. Kouzai, and H. Honma (Kanto Gakuin University)|
||Copper Superfilling by PEG-Cl Suppression Breakdown - M.
Hayase, M. Taketani, K. Aizawa, T. Hatsuzawa (Tokyo Institute of Technology), and K. Hayabusa (Ebara Research Co., Ltd.)|
||Superfill of Submicrometer Features from a Silver-Cyanide Electrolyte - B. Baker, T.
Moffat, D. Josell, and D. Wheeler (National Institute of Standards and Technology)|
||Multi-Scale Simulations of Copper Electrodeposition onto a Resistive Substrate - T. Drews (University of Illinois at Urbana-Champaign), S. Krishnan (Indiana University), J. Alameda (National Center for Supercomputing Applications), D. Gannon (Indiana University), R.
Braatz, and R. Alkire (University of Illinois at Urbana-Champaign)|
Co-Chairs: C. Reidsema-Simpson and G.S. Mathad
||Suppression by PEG and Halide Ion in Copper Electroplating - M.
Hayase, M. Taketani, T. Hatsuzawa (Tokyo Institute of Technology), and K. Hayabusa (Ebara Research
||Effect of Suppressors on Copper Electrochemical Deposition Fill Efficiency - J. Flake, C. Simpson, and E. Acosta (Motorola)|
||"Seedless" Copper ECD on TiN Barrier Layers - S. Kim and D. Duquette (Rensselaer Polytechnic Institute)|
||In Situ Microscopic Observation of Spontaneous Recrystallization at Room Temperature in Electrodeposited Copper Metallization -
D.N. Buckley, S. Ahmed, and M. Serantoni (University of Limerick)|
||Twenty-Minute Intermission - |
||Microstructural Evolution of Electroplated Copper During Self-Annealing - P.
Freundlich, M. Militzer, and D. Bizzotto (The University of British Columbia)|
||Vibrational Spectroscopy of Polyethelyne Glycol and Brighteners on Copper - B. Baker, C. Yang, L. Richter, and T. Moffat (National Institute of Standards and Technology)|
||Self-annealing Effect of Electrolessly Deposited Copper Thin Films Based on Co(II)-ethylenediamine as a Reducing Agent -
J.J. Kim, C.H. Lee, and S.H. Cha (Seoul National University)|
||Electroless CU Deposition on Plasma Treated Tantalum Nitride -
Y.S. Lee, S.W. Hong, and J.-W. Park (Hanyang University)|
||Microstructure and Adhesion Strength of Electroless-plated Cu Film on Self-catalyzed Cu Seeded by MEVVA - U.-S. Chen, J.-H. Lin, W.-J. Hsieh, and
H.C. Shih (National Tsing Hua University)|
Tuesday October 22, 2002
Contacts, Barrier, and Low-k Inter Level Dielectric Films
Co-Chairs: B. Baker and Y. Kuo
||Base Contact Issues of Si/SiGe-HBTs with Emphasis on Source/Drain Contacts of CMOS Devices - J. Hohaus and H.-U. Schreiber
||Comparison of Amorphous and Crystalline Tantalum Nitrides as Diffusion Barriers in Cu/FSG Structure - C.-C. Chang and J.-S. Chen (National Cheng Kung University)|
||Twenty-Minute Intermission - |
||Development and Characterization of a PECVD Silicon Nitride for Damascene Applications - A. Lee, N.
Rajagopalan, M. Le, B.H. Kim, and H. M'Saad (Applied Materials, Inc.)|
||Copper-Barrier and Hard-Mask Elaboration by Plasma-Enhanced Chemical Vapor Deposition using Organosilane Precursors - B. Remiat
(STMicroelectronics), F. Gaillard (Applied Materials), J. Durand (Institut Europeen des Membranes de Montpellier), F. Fusalba
(STMicroelectronics), V. Jousseaume, and C. Lecornec (CEA Grenoble)|
||Plasma Modification of the Low k Polyimide Film to Further Reduce Its k Value - T. Chung, Y.
Kuo, and H. Nominanda (Texas A and M University)|
||Structural Properties and Defect Characterisation of Plasma Deposited Carbon Doped Silicon Oxide Low-k Dielectric Films - T. Wong, V.
Ligatchev, and R. Rusli (Nanyang Technological University)|
||The Effect of TEOS / MTES Ratio on the Structural and Dielectric Properties of Porous Silica Film - S. Yu,
T.K.S. Wong, X. Hu, and K. Pita (Nanyang Technological University)|
||Evaluatuion of Activating Process for Fine Pattern Deposition - T.
Nishiwaki, Y. Watanabe, S. Watanabe, K. Tashiro, and H. Honma (Kanto Gakuin University)|
Low-k Inter Level Dielectric Films
Co-Chairs: G.S. Mathad and B. Baker
||Electrical and Material Stabilities of Cu/FSG and Cu/OSG Couples at Elevated Temperatures - J.-S.
Jeng, J.-S. Chen (National Cheng Kung University), G. Lin, and J. Su (Applied Materials Taiwan)|
||Structural and Thermal Characterization of Spin-on Porous Low-k Dielectrics - S. Yu,
T.K. Goh, T.K.S. Wong (Nanyang Technological University), C. He (Institute of Materials Research and Engineering), and S. Wu (Institute of Microelectronics)|
||Processing and Characterization of DMDES – TEFS Hybrid Thin Films - Z. Zhang, B. Gorman, D. Mueller, and R. Reidy (University of North Texas)|
||Supercritical CO_2 Post-Etch Cleaning of a Patterned Porous Low-K Dielectric - D. Peters (Ashland Specialty Chemical Company), K. Masuda, K.
Iijima, T. Yoshikawa (Kobe Steel, Ltd.), G. Asai, and Y. Muraoka (Dainippon Screen Mfg. Co., Ltd.)|
||Twenty-Minute Intermission - |
||Plasma Curing of Porous MSQ Films - C.
Waldfried, O. Escorcia, Q. Han, and I. Berry (Axcelis Technologies, Inc.)|
||Etch Residue Removers Compatible with Porous Low-k Dielectrics - M.
Egbe, J. Rieker, S. Ficner, and D. Durham (Ashland Specialty Chemical Company)|
||HeH2 Plasma for Resist Stripping over Porous MSQ Low-k Films - Q. Han, C.
Waldfried, O. Escorcia, and I. Berry (Axcelis Technologies, Inc.)|
||Film Nanotechnology - T. Khoperia (Georgian Academy of Sciences)|
Wednesday October 23, 2002
Reliability and Copper CMP
Co-Chairs: T.L. Ritzdorf and K.B. Sundaram
||Mechanisms of Copper Removal During Chemical Mechanical Polishing - T.
Du, V. Desai (University of Central Florida), D. Tamboli (Ashland Specialty Chemical Company), V.
Chathapuram, and K. Sundaram (University of Central Florida)|
||Electrochemical View of Copper Chemical Mechanical Planarization - Y.
Ein-Eli, E. Rabinovich, E. Rabkin, and D. Starosvetsky (The Technion-Israel institute of Technology)|
||Electrochemical Planarization of Copper - L. Loparco and D. Duquette (Rensselaer Polytechnic Institute)|
||Enhancement of Post Copper CMP Cleaning Using CO_2 Cryogenic Technology - S.
Banerjee, H. Chung (EcoSnow Systems, Inc.), R. Small, B. Scott, and L. Yao (EKC Technology, Inc)|
||Post CMP Passivation of Copper Interconnects - J. Flake, S. Usmani (Motorola), J. Groschopf (AMD-Motorola Alliance), K. Cooper (Motorola),
S.P. Sun (AMD-Motorola Alliance), S. Thrasher, C. Goldberg, O. Anilturk, and J. Farkas (Motorola)|
||Abrasive Free Polishing For ULSI Cu Damascene Interconnect -
J.V. Fang (National Chiao Tung University), M.V.S. Tsai, B.V.T. Dai (National Nano Device Laboratories), and
M.V.S. Feng (National Chiao Tung University)|
Co-Chairs: H.S. Rathore and T.L. Ritzdorf
||Copper Chemical Mechanical Planarization Processes with Carbon Dioxide - G. Denison, P.
Visintin, and J. Desimone (University of North Carolina at Chapel Hill)|
||The Plasma Charging Damages for Gate Oxide and Hot-Carrier Degradation and Electromigration Properties in Cu Interconnects - D.-S. Su,
J.J. Wang, C.T. Yang, D.H. Chen, H.C. Tseng, H. Chen, and S.Y. Lee (Taiwan Semiconductor Manufacturing Company)|
||Copper Barrier Polishing Chemistries for Low-K Films - R. Small, L.
Yao, and K.Z. Kadowaki (EKC Technology, Inc.)|
||Process Development for Copper CMP on Ultra Low-K Dielectrics - S. Hosali (Philips Semiconductors,
Eindhoven), G. Martin (Motorola Inc.), A. Gonzalez (International SEMATECH), and S. Joshi (Texas Instruments)|
||Twwenty-Minute Intermission - |
||A Comprehensive Study of Liner CMP for Advanced Cu/low k Planarization - T.-C. Tsai, Z.-H. Lin, S.-C.
Hu, A. Yu, F. Yang, and L.-Y. Fang (United Microelectronic Corp.)|
||Chemical Mechanical Polishing of Silicon Carbide and Low-k Carbon Doped Oxide Films - W. Chen, W. Gray (Dow Corning Corporation), and K. Block
||Improvement of Planarization Efficiency of CU Electropolishing by Additives - S.-C. Chang (National Chiao Tung University), J.-M. Shieh (National Nano Device Laboratories), C.-C. Huang (National Chiao Tung University), B.-T. Dai (National Nano Device Laboratories), and M.-S. Feng (National Chiao Tung University)|
||Microstructure and Interfacial Reaction of Cu(Ti)/SiO2 Interconnect - C.-J. Liu and J.-S. Chen (National Cheng Kung University)|
||Proven Extensibility of Low Damage Cu/low k CMP Process for sub-0.13um ULSI Interconnects - T.-C. Tsai, S.-C.
Hu, C.-L. Hsu, Z.-H. Lin, M.-H. Lin, and S.-H. Hsu (United Microelectronic Corp. Central Research and Development Division)|