ECS Logo
Home ECS Members Education Awards Students Sponsorship Publications Meetings
ECS Membership
Short Courses
Professional Development Workshops
Students Center
Career Center
Online Training
ECS Member Info
Support the Future
Renew Now
Join Now
Membership
Career Center
Technical Interest Areas and Divisions
Sections
Governance and Committees
Resource Links

 

ECS Short Courses

 

Washington, DC | Sunday, October 7, 2007

Short Course #6
Basics of Cleaning Processing for Integrated Circuit Manufacturing
Karen A. Reinhardt, Jeffery W. Butterbaugh, and Robert J. Small, Instructors

Course Objectives

  • Provide a basic knowledge of various surface conditioning and cleaning technologies used in the manufacture of integrated circuits.
  • Provides an overview of the processes and equipment used for wet, plasma, and dry cleaning. Plus discusses the chemistries used for these cleaning steps.
  • Provides an overview and allows comparison of established surface conditioning and cleaning techniques and new technologies. In addition, this course will introduce new technologies such as supercritical fluid processing and cryoaerosol processing that may be used for future clean requirement.
  • Provides information on specific surface conditioning techniques including critical cleaning, photoresist stripping, and post-CMP cleaning. Plus discusses techniques such as megasonics, dilute chemistries, and the use of ozone.
  • Provides an understanding of how the cleans affects low-k dielectrics and copper. Plus cleaning challenges for new materials.

Course Description

This one day course provides a working knowledge of surface conditioning and cleaning techniques used in the manufacture of integrated circuits. Fundamentals of the techniques used for cleaning the wafer surface will be discussed. Practical applications and methods for cleaning will be presented. Upon completing this course participants will have a understanding of all types of cleaning processes used in IC manufacturing; surface conditioning for pre-diffusion clean, in particular pre-gate oxide clean, post-etch and post-implant photoresist removal, particle removal, post-CMP clean. Participates will be able to understand the cleaning roadmaps and limitations of clean technologies as the node sizes decrease. The course participant should be able to make informed decisions on the surface conditioning and cleaning processes and techniques to utilize for IC manufacturing.

Who Should Attend

The intended audience is any engineer or manager associated with using or supplying cleaning, surface conditioning, and contamination free technologies for IC manufacturing. In particular semiconductor manufacturing process engineers, process development engineers, and integration engineers, IC equipment application and process engineers, and IC cleaning chemical process engineers are the target audience.

 

About the Instructors

Karen A. Reinhardt is the managing instructor for the course. She is Principal Consultant at Cameo Consulting in San Jose, California, working with start-up companies developing cleaning and surface conditioning technologies for the IC industry. Prior to forming a consulting company, Karen was employed at Novellus Systems in San Jose, California. In this role she was responsible for investigating and assessing new and unique cleaning technologies that will allow realization of the ITRS roadmap with respect to smaller geometries, new materials, and the environmental issues associated with current cleaning processes. Karen has published over 30 technical papers ranging from plasma processing to damage characterization and cleaning technology assessment. She has been awarded six patents. Karen is currently co-leading the ITRS surface preparation technical working group.

Jeffery W. Butterbaugh is Chief Technologist at FSI International. Since joining FSI International in 1993 he has held several positions and led process development teams for all aspects of surface preparation including photochemical, anhydrous HF, cryogenic aerosol and wet cleaning technologies. He is currently co-chair of the Front End Processing Technology Working Group of the ITRS. Prior to joining FSI, Dr. Butterbaugh worked as a photolithography engineer and as a plasma etch development engineer for IBM in Burlington, Vermont. He received his PhD in chemical engineering from MIT and his BS in chemical engineering from the University of Minnesota. He holds 8 U.S. Patents and has authored or co-authored over 30 papers on surface conditioning and plasma etching.

Robert J. Small is currently the Technology Consultant for RS Associates. He previously held the positions of CMP Technical Director and also was the R&D Technical Director for the remover line of business at DuPont/EKC Technology. He was involved in developing new chemistries for post-CMP cleaning, CMP chemistries and post-etch residue removal. He has a BS from Norwich University, an MS from Texas Tech University, and a PhD in organic photochemistry from the University of Arizona. He holds more than 27 U.S. and foreign patents and currently has ten submitted U.S. patent applications., Bob has authored or co-authored over 120 articles and presentations including BEOL, post clean treatment, post CMP and CMP processes.

For additional information about Education, please contact: education @electrochem.org

 
 

Home | ECS Members | Education | Awards | Students | Sponsorship | Publications | Meetings

About | Contact | Privacy Policy | Site Map

© 2006 The Electrochemical Society; all rights reserved.

 

 

About ECS | Contact ECS

SEARCH ECS: