207th ECS Meeting - Quebec City, Canada

May 15 - May 20, 2005

PROGRAM INFORMATION
 

J2 - 12th International Symposium on Silicon-on-Insulator Technology and Devices

Electronics and Photonics
 

Tuesday, May 17, 2005

Room 301A, Level 3, Quebec City Convention Center

SOI Physics and Simulations

Co-Chairs: G. Celler & M.S. Liu
TimeAbs#Title and Authors
08:10 Introductory Remarks (10 Minutes)
08:20 527 Advanced SOI MOSFETs: Structures and Device Physics O. Faynot (LETI), A. Vandooren (Freescale Semiconductor) and T. Poiroux (CEA)
09:00 528 Nanoscale SOI MOSFETs: Single vs. Double Gate J. Li, T. Walls and K. Likharev (Stony Brook University)
09:40 Intermission (20 Minutes)
10:00 529 Subthreshold Quantum-Mechanical Effects in Undoped Double-Gate MOSFETs V. Trivedi and J. Fossum (University of Florida)
10:20 530 Calibration of Numerical Simulation Tools For Fine Geometry SOI CMOS R. Long, R. Duane, A. Mathewson and B. O' Neill (Tyndall National Institute)
10:40 531 Monte Carlo Simulation of Silicon-based Velocity Modulation Transistors C. Sampedro, F. Gamiz, A. Godoy (Universidad de Granada), M. Prunnila and J. Ahopelto (VTT Information Technology, Finland)
11:00 532 Influence of Confined Acoustic Phonons on the Electron mobility in Ultrathin Silicon-on-Insulator Layers F. Gamiz, P. Cartujo-Cassinello, J. Roldan, C. Sampedro and A. Godoy (Universidad de Granada)
11:20 533 Evaluation of Ultra-Thin Double Gate MOSFETs for the 45 nm Technology Node N. Barin (University of Ferrara), C. Fiegna (University of Bologna), D. Esseni (University of Udine) and E. Sangiorgi (University of Bologna)
11:40 534 Meta-Stabe Dip (MSD) Effect in Fully-Depleted SOI CMOSFETs M. Bawedin (UCL), J. Yun (Chungnam), S. Cristoloveanu (IMEP), D. Flandre (Université catholique de Louvain) and C. Raynaud (CEA-LETI & STMicroelectronics)
 

Technology, Circuits, and Radiation Hardness

Co-Chairs: S. Cristoloveanu & D.K. Schroder
TimeAbs#Title and Authors
14:00 535 High Performance SOI Technology for Sub-45nm Gate Length CMOS Manufacturing M. Horstmann (AMD Saxony LLC Co. KG), D. Greenlaw, P. Huebler, R. Stephan, T. Feudel, A. Wei, K. Frohberg, M. Lenski, K. Wieczorek, G. Burbach, C. Schwan, P. Press, T. Kammler, H. Bierstedt, R. Otterbach, A. Neu, M. Schaller, H. Salz, J. Hohage, H. Ruelke, J. Klais, G. Grasshoff, E. Ehrichs, S. Goad, M. Raab and N. Kepler (AMD Saxony LLC CoKG)
14:40 536 Implementation of High Performance Operational Transconductance Amplifiers using Graded-Channel SOI nMOSFETs S. Gimenez (Universidade de São Paulo), M. Pavanello (Centro Universitario da FEI), J. Martino (Universidade de Sao Paulo, Brazil) and D. Flandre (Université catholique de Louvain)
15:00 537 A Novel sub 50nm DG-SOI Self-restoring Domino Logic D. Ioannou and D. Kontos (George Mason University)
15:20 538 SOI Image Sensor Optimized Pinned Photodiode on Handle Wafer Y. Cho, S. Kwon, K. Park, K. Sawada, M. Ishida and S. Choi (Kyungpook National University)
15:40 Intermission (20 Minutes)
16:00 539 Recent Radiation Issues In Silicon-On-Insulator Devices M. Alles, R. Schrimpf, D. Fleetwood, R. Reed and B. Jun (Vanderbilt University)
16:40 540 Total-Dose Hardness Of The SOI 4-Gate Transistor (G4-FET) K. Akarvardar, S. Cristoloveanu (IMEP), R. Schrimpf (Vanderbilt University), B. Dufrene (IBM), P. Gentil (IMEP), B. Blalock (University of Tennessee) and M. Mojarradi (JPL)
17:00 541 Estimating Proton Induced SEU Cross-Sections of SOI CMOS SRAMs M. Liu, H. Liu, D. Nelson (Honeywell) and H. Hughes (Naval Reserach Laboratory)
17:20 542 High-Temperature Behavior of Fully-Depleted SOI MOSFETs in Case of Charge Instability of Buried Oxide O. Nazarov, Y. Houk (Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine), Y. Vovk, V. Lysenko (Lashkaryov Institute of Semiconductor Physics, National Academy of Sciences of Ukraine, Kyiv, UKRAINE) and D. Flandre (Université catholique de Louvain)
 

Room 200A/200B/200C, Level 2, Quebec City Convention Center

Tuesday Evening Poster Session

Co-Chairs: G.K. Celler & S. Cristoloveanu
TimeAbs#Title and Authors
o 543 The Temperature Mobility Degradation Influence on the ZTC of PD and FD SOI MOSFETs J. Martino (Universidade de Sao Paulo, Brazil), L. Camillo (LSI/USP, Brazil), E. Simoen and C. Claeys (IMEC)
o 544 Low Temperature and Channel Engineering Influence on Harmonic Distortion of SOI nMOSFETs for Analog Applications M. Pavanello (Centro Universitario da FEI), A. Cerdeira, M. Alemán (CINVESTAV, Mexico), J. Martino (Universidade de Sao Paulo, Brazil), L. Vancaillie (Universite catholique de Louvain, Belgium) and D. Flandre (Université catholique de Louvain)
o 545 Distortion of Silicon-on-Insulator Wafers During CMOS Processing P. Riley, T. Manchester (Spansion LLC), B. Ang (Xilinx Corporation) and J. Thomas (Spansion LLC)
o 546 Modification of Si/SiO2 Interface in SOI Structures by Hydrogen Implantation: Radiation Tolerance I. Antonova (Institute of Semiconductor Physics)
o 547 High Mobility Poly-silicon Characterization Using a Modified Single Cut PCT Structure R. Sanders, T. Keyser and J. Yue (Honeywell Space Systems)
o 548 SIMS Measurements of Metal Conamination in SOI R. Hockett, M. Yang and A. Wang (Charles Evans & Associates)
 

Wednesday, May 18, 2005

Room 301A, Level 3, Quebec City Convention Center

Ion-Induced Splitting of Semiconductors

Co-Chairs: C. Maleville & A. Ogura
TimeAbs#Title and Authors
10:00 549 Isotope Effects in Low-Energy Ion-Induced Splitting B. Terreault (Universite du Quebec), M. Chicoine (Universite de Montreal), N. Desrosiers, A. Giguere (Universite du Quebec), G. Hobler (Technische Universität Wien), O. Moutanabbir (Universite du Quebec), P. Simpson (University of Western Ontario) and T. Zahel (Technische Universitaet Wien)
10:40 550 Determining the Mechanisms of Fracture in Group-IV Materials K. Bourdelle (Soitec)
11:20 551 Atomistic Simulation of the Isotope Effect on Defect Formation in H/D-Implanted Si T. Zahel (Technische Universitaet Wien), G. Otto and G. Hobler (Technische Universität Wien)
11:40 552 On the Mechanism of the Smart Cut Layer Transfer in Relaxed SiGe Layers P. Nguyen, C. Aulnette, E. Guiot, K. Bourdelle, I. Cayrefourcq, C. Deguet, S. Sartori, A. Tauzin, C. Lagahe-Blanchard and A. Soubie (Soitec)
 

Materials, Photonics, and Electrical Properties

Co-Chairs: K. Izumi & R.S. Hockett
TimeAbs#Title and Authors
14:00 553 Mobility Enhancement Through Substrate Engineering I. Cayrefourcq, M. Kennard, F. Metral, C. Mazure, A. Thean, M. Sadaka, T. White and B. Nguyen (SOITEC)
14:40 554 Silicon-on-insulator (SOI) as a Photonics Platform D. Xu (Institute for Microstructural Sciences (IMS)), P. Cheben, B. Lamontagne, S. Janz and W. Ye (IMS, NRC)
15:20 555 Ring Resonator with Sharp U-Turns Using an SOI-based Photonic Crystal Waveguide Y. Omura, Y. Iida, F. Urakawa and Y. Ogawa (Kansai University)
15:40 556 Germanium Hut Nanostressors on Free-Standing Ultrathin SOI M. Roberts, P. Evans, D. Savage, M. Lagally (University of Wisconsin, Madison), Y. Xiao, B. Lai and Z. Cai (Advanced Photon Source, Argonne National Laboratory)
16:00 Intermission (20 Minutes)
16:20 557 ALD Alumina Films as Buried Dielectric Layers for SOI Structures C. de Beaumont (CEA/Leti Grenoble), H. Moriceau (CEA/Leti), O. Rayssac (Soitec), N. Bresson (IMEP / SOITEC), S. Cristoloveanu (IMEP) and A. Charvet (CEA/Leti DIHS/LTFC)
16:40 558 New SOI Devices Transferred onto Fused Silica by Direct wafer Bonding C. Lagahe-Blanchard, B. Aspar (TRACIT), P. Paillet, V. Ferlet- Cavrois, N. Fel (CEA / DIF), J. Du Port De Pontcharra (CEA / LETI) and H. Moriceau (CEA/Leti)
17:00 559 Formation of Single-Crystal Silicon Layers on Insulator Islands Using Selective Epitaxial Growth and Laser Crystallization H. Cho, W. Xianyu, X. Zhang, H. Yin and T. Noguchi (Samsung Advanced Institute of Technology)
17:20 560 Impact of the Schottky Contacts on Characterization of Ultra-Thin SOI Pseudo-MOS Transistors S. Sato, K. Komiya (Kansai University), N. Bresson (IMEP / SOITEC), Y. Omura (Kansai University) and S. Cristoloveanu (IMEP)
17:40 561 Charge Accumulation in Oxides of SOI Wafers Fabricated by Hydrogen Slicing O. Naumova, A. Frantzusov, D. Nikolaev and V. Popov (Institute of Semiconductor Physics)
 

Thursday, May 19, 2005

Room 301A, Level 3, Quebec City Convention Center

Technology and Electrical Properties

Co-Chairs: F. Gamiz & D.E. Ioannou
TimeAbs#Title and Authors
08:00 562 Demonstration and Device Design Consideration of Vth-Controllable Independent Double-Gate MOSFET (4-Terminal XMOS) M. Masahara, Y. Liu, K. Sakamoto, K. Endo, K. Ishii, T. Sekigawa, H. Koike and E. Suzuki (National Institute of Advanced Industrial Science and Technology)
08:40 563 Multiple Independent Gate Field Effect Transistors Device, Process, Applications L. Mathew, M. Sadd, A. Thean, T. Stephens, R. Mora, M. Zavala, B. Nguyen, R. Rai, R. Shimer, W. Zang, M. Chowdhry, J. Fossum, Y. Du, S. Kalpat, C. Parker, D. Sing and J. Morgab (Freescale)
09:20 564 Corner and Coupling Effects in Triple-Gate FETs R. Ritzenthaler, O. Faynot, C. Jahan (CEA LETI) and S. Cristoloveanu (IMEP)
09:40 Intermission (20 Minutes)
10:00 565 Analysis of Deep Submicrometer Bulk and Fully Depleted SOI nMOSFET Analog Operation at Cryogenic Temperatures M. Pavanello (Centro Universitario da FEI), J. Martino (Universidade de Sao Paulo, Brazil), E. Simoen and C. Claeys (IMEC)
10:20 566 Effects of Etching Processes on the Properties of pseudo-MOSFETs for the UTSOI Characterization Y. Bae (Uiduk University), K. Kwon, J. Lee, J. Lee (Kyungpook National University), H. Woo (KIGAM) and S. Cristoloveanu (IMEP)
10:40 567 Mercury Pseudo-MOSFET (HgFET) Drain Current Dependence on Surface Treatment J. Choi and D. Schroder (Arizona State University)
11:00 568 Short-channel, Narrow and Ultra-Thin Oxide Effects in Advanced SOI MOSFETS S. Zaouia, S. Goktepeli, A. Perera (Freescale Semiconductor) and S. Cristoloveanu (IMEP)
11:20 569 Adaptation of Y-MOSFET and HgFET Techniques for Ultra Thin SOI N. Bresson (IMEP / SOITEC), F. Allibert (SOITEC) and S. Cristoloveanu (IMEP)
11:40 570 Electrical Characteristics of SOI-Like Structures Formed in Nitrogen or Oxygen Implanted Silicon under High Pressure I. Antonova (Institute of Semiconductor Physics), A. Misiuk (2Institute of Electron Technology) and C. Londos (University of Athens)
 

Technology and Characterization

Co-Chairs: J.G. Fossum & B. Aspar
TimeAbs#Title and Authors
14:00 571 Is SOI CMOS A Promising Technology For SOCs In High Frequency Range ? C. Raynaud (CEA-LETI & STMicroelectronics), F. Gianesello, C. Tinella, P. Flatresse (STMicroelectronics), R. Gwoziecki, P. Touret (CEA-LETI), G. Avenier, S. Haendler, O. Gonnard, G. Gouget, G. Labourey, J. Pretet, M. Marin, T. Schwartzmann, R. Di FRENZA (STMicroelectronics), D. Axelrad (CEA-LETI), P. Delatte (CISSOID), G. Provins, J. Roux, E. Balossier, J. Vildeuil, S. Boret, B. Van Haaren, P. Chevalier, L. Boissonnet, A. Chantre, D. Gloria, P. Scheer (STMicroelectronics), C. Pavageau and G. Dambrine (IEMN)
14:40 572 Characterization of Ultra-Thin SOI and SSOI Substrates S. Bedell (IBM), H. Hovel (IBM Research), A. Domenicucci (IBM Microelectronics), K. Fogel, D. Sadana and A. Reznicek (IBM Research)
15:20 573 UV Scanning Enabling Advanced SOI Defectivity Monitoring C. Maleville, C. Moulin, D. Delprat (SOITEC), W. Mcmillan, J. Payne, K. Birdwell and R. Moirin (KLA-Tencor)
15:40 574 SIMS Measurements of Dopants in SOI Wafers R. Hockett (Charles Evans & Associates), S. Smith (Chalres Evans & Associates), M. Yang, A. Wang and S. Wang (Charles Evans & Associates)
16:00 575 Evaluation of Commercial SGOI and SSOI Wafers Comparison with Epitaxially Grown Strained-Si by Means of Laser Confocal Inspection System A. Ogura (Meiji University) and O. Okabayashi (Lasertec Vorporation)
16:20 576 Optical Characterization of Implanted Thin SOI Films O. Faynot, L. Clavelier (LETI) and G. Barna (Texas Instruments)
16:40 577 Investigation of Second-Harmonic Generation for SOI Wafer Metrology R. Pasternak, B. Jun, R. Schrimpf, D. Fleetwood, M. Alles (Vanderbilt University), R. Dolan (Ibis Technology Corporation, Danvers, MA), R. Standley (MEMC) and N. Tolk (Department of Physics and Astronomy)
17:00 Concluding Remarks (10 Minutes)