216th ECS Meeting - Vienna, Austria

October 4 - October 9, 2009

PROGRAM INFORMATION
 

E10 - ULSI Process Integration 6

Electronics and Photonics
 

Tuesday, October 6, 2009

Hall N, Level 01 - Green

Keynotes

Co-Chair(s): C. Claeys and H. Iwai
TimeAbs#Title and Authors
08:15 Introductory Remarks (5 Minutes)
08:20   2347   Modeling Techniques for Strained CMOS Technology V. Sverdlov and S. Selberherr (Institute for Microelectronics / TU Wien)
09:00   2348   Integration Challenges and Opportunities of Nanoelectronic Devices Y. Nishi (Stanford University)
09:40 Intermission (20 Minutes)
10:00   2349   Bio Inspired Architectures in the Nanoscale Integration Era T. Shibata (The University of Tokyo)
10:40   2350   Technology Evolution of Silicon Nanoelectronics S. Zaima (Nagoya University)
 

Device Technology

Co-Chair(s): S. Deleonibus
TimeAbs#Title and Authors
11:20   2351   Development of III-V MOSFET Process Modules Compatible with Silicon ULSI Manufacture I. Thayne, X. Li, W. Jansen, O. Ignatova, S. Bentley, H. Zhou, D. Macintyre, S. Thoms and R. Hill (University of Glasgow)
 
Co-Chair(s): S. Cristoloveanu and R. Todi
TimeAbs#Title and Authors
14:00   2352   Multi-Gate Devices for High Performance, Ultralow Power and Memory Applications F. Balestra (Grenoble INP-Minatec)
14:30   2353   Ultrathin Body Effects in Single-Gate Multiple Gate SOI Transistors F. Gamiz, L. Donetti, C. Sampedro, A. Godoy and N. Rodriguez (University of Granada)
15:00   2354   Optical and Electrical Characterizations of Defects in SiGe-on-Insulator H. Nakashima, D. Wang and H. Yang (Kyushu University)
15:30   2355   Very High Performance CMOS on Si(551) Surface Using Radical Oxidation Silicon Flattening Technology and Accumulation-Mode SOI Device Structure W. Cheng, A. Teramoto and T. Ohmi (Tohoku University)
16:00 Intermission (20 Minutes)
16:20   2356   Variability Headaches in Sub-32 nm CMOS A. Asenov (University of Glasgow)
16:50   2357   Low-Power SiGe HBT and Circuit Technology for Future Quasi-Millimeter-Wave Wireless Communications K. Washio, N. Shiramizu, M. Miura, T. Nakamura, K. Oda and T. Masuda (Hitachi, Ltd.)
17:20   2358   Advanced Charge Storage Memories: From Silicon Nanocrystals to Molecular Devices B. De Salvo (LETI)
 

Wednesday, October 7, 2009

Hall N, Level 01 - Green

Front-end-of-line integration

Co-Chair(s): M. Tao and F. Martin
TimeAbs#Title and Authors
08:00   2359   Overwhelming the 0.5 nm EOT Level for CMOS Gate Dielectric K. Kakushima, P. Ahmet and H. Iwai (Tokyo Institute of Technology)
08:30   2360   Atomically Controlled CVD Processing for Doping of Si-based Group IV Semiconductors J. Murota, M. Sakuraba (Tohoku University) and B. Tillack (IHP and Technische Universität Berlin)
09:00   2361   Low-Temperature Oxidation of Semiconductor Surfaces by Use of a Novel High-Ddensity Microwave Plasma Apparatus A. Gschwandtner (R3T GmbH)
09:20   2362   Optimization of Shallow Junctions Achieved by Cluster Ion Implants and Excimer Laser Annealing W. Krull, K. Sekar (SemEquip Inc), C. Sebatier and S. Rack (Excico France)
09:40 Intermission (20 Minutes)
 

Front-end-of-line Integration

Co-Chair(s): F. Martin and M. Tao
TimeAbs#Title and Authors
10:00   2363   On the Low-Frequency Noise Performance of Embedded Si:C nMOSFETs C. Claeys, E. R. Simoen, P. Verheyen, R. Loo (IMEC), V. Machkaoutsan (ASM-Belgium), M. Bauer and S. Thomas (ASM America)
10:20   2364   SiGe SEG Growth for Buried Channels p-MOS Devices A. Hikavyy, R. Loo, L. Witters (IMEC), S. Takeoka (Panasonic), J. Geypen, B. Brijs, C. Merckling, M. Caymax and J. Dekoster (IMEC)
10:40   2365   Silicon:Carbon Source/Drain Stressors: Integration of a Novel Nickel Aluminide-Silicide and Post-Solid-Phase-Epitaxy Anneal for Reduced Schottky-Barrier and Leakage S. Koh, W. Zhou, R. Lee, M. Sinha (National University of Singapore), C. Ng (Chartered Semiconductor Manufacturing), Z. Zhao, H. Maynard, N. Variam, Y. Erokhin (Varian Semiconductor), G. Samudra and Y. Yeo (National University of Singapore)
11:00   2366   Stress Characterization of Selective Epitaxial Si1-xGex Deposition for Embedded Source/Drain before and after Millisecond Laser Anneal M. Bargallo Gonzalez, T. Fernandez-Lanas, E. Rosseel, A. Hikavyy, H. Dekkers, G. Eneman, P. Verheyen, R. Loo, E. R. Simoen and C. Claeys (IMEC)
11:20   2367   Atomically Controlled Plasma Processing for Epitaxial Growth of Group IV Semiconductor Nanostructures M. Sakuraba, K. Sugawara and J. Murota (Tohoku University)
11:40   2368   Electrical and Structural Properties of Platinum Silicided p-Type Schottky Barrier Metal-Oxide-Semiconductor Field-Effect Transistors Using Silicidation Through Oxide Technique C. Choi, R. Moon, M. Jeong, K. Shim (Chonbuk National University) and M. Jang (Electronics and Telecommunications Research Institute)
 
Co-Chair(s): F. Martin and S. Deleonibus
TimeAbs#Title and Authors
14:00   2369   A Roadmap for Nano-CMOS H. Iwai (Tokyo Institute of Technology)
14:30   2370   Low-Frequency Noise Analysis of the Impact of an LaO Cap Layer in HfSiON/Ta2C Gate Stack nMOSFETs E. R. Simoen, A. Akheyar, E. Rohr, A. Mercha and C. Claeys (IMEC)
14:50   2371   Integration Challenges in Standard CMOS with Multiple Gate Oxide Thicknesses J. J. Naughton and J. Towner (ON Semiconductor)
15:10   2372   Remote Coulomb Scattering Limited Mobility in MOSFET with CeO2/La2O3 Gate Stacks M. Mamatrishat, M. Kuoda, K. Kakushima (Tokyo Institute of Technology), P. Ahmet, K. Tsutsui (Tokyo Institute of Technolgy), N. Sugii, K. Natori, T. Hattori and H. Iwai (Tokyo Institute of Technology)
15:30 Intermission (20 Minutes)
 

Back-end-of-line Integration

Co-Chair(s): M. Hirayama and T. Spooner
TimeAbs#Title and Authors
15:50   2373   Advanced Contact Technology for MOSFETs: Integration of New Materials for Series Resistance Reduction Y. Yeo and R. Lee (National University of Singapore)
16:20   2374   The Effect of Material and Process Interactions on Cu/ULK BEOL Integration T. A. Spooner (International Business Machine), J. Arnold, D. Canaperi, J. Chen, S. Chen, S. Gates (International Business Machines), A. Isobayashi (Toshiba America Electronic Components), P. Leung, S. Papa Rao, M. Sankarapandian (International Business Machines), H. Shobha (IBM Albany, STG) and O. Van der Straten (IBM Research)
16:50   2375   Three-Dimensional Profiling of Process-Induced Stress in Cu Through-Silicon Vias for Wafer-Scale, 3D Integration C. McDonough and R. Geer (University at Albany)
17:20   2376   X-ray Nanotomography Studies of TSV Structures E. Zschech (AMD Saxony LLC & Co. KG, A Company of Globalfoundries, Dresden), F. Michael (Xradia Inc., Concord/CA) and P. Krueger (Fraunhofer IZFP, Dresden)
 

Gallery, Level 01 - Green

Poster Session

TimeAbs#Title and Authors
o   2377   An Improvement Method of the Reliability Characteristics of Cu Metallization for Deep Submicron ULSI Copper Process P. Chen (I-Shou University)
o   2378   Fast Detrapping Transients in High-K Dielectric Films R. Rao and F. Irrera (IU.NET)
o   2379   A Novel Field-Enhanced-Nanowire Poly-Si Thin-Film Transistor Silicon-Oxide-Nitride-Oxide-Silicon Nonvolatile Memory with Gate-All-Around Structure Has Been Proposed to Achieve a Higher Program and Erase Efficiency T. Liao (National Chiao Tung University), S. Chen, P. Hsu (Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan.), T. Kang, C. Lin (Department of Electronic Engineering, Feng Chia University, Taichung, Taiwan.) and H. Cheng (Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, Taiwan.)
o   2380   Influence of Phosphorus Concentrations in a-SiN:H Gate Layer on Electron Mobility in Thin Film Transistors J. Kim (Kyoungpook National University), Y. Sohn (Catholic University of Daegu) and S. Choi (Kyoungpook National University)
o   2381   Contact Resistances Between Low-Cost Electrode Materials and Gallium Indium Zinc Oxide Thin-Film Transistors W. Kim (Hanyang Univeristy), Y. Moon, S. Lee, B. Kang, T. Kwon (Hanyang University), K. Kim (Hanyang Univ.) and J. Park (Hanyang University)
o   2382   Charge Trapping Nonvolatile Memory P. Lorenzi, R. Rao (IU.NET), G. Ghidini (Numonyx), F. Palma and F. Irrera (IU.NET)
 

Thursday, October 8, 2009

Hall N, Level 01 - Green

Back-end-of-line Integration

Co-Chair(s): T. Spooner and M. Hirayama
TimeAbs#Title and Authors
08:30   2383   Electrochemical Processes for the Production of Copper Interconnects on Nonmetallic Barrier Layers D. J. Duquette (Rensselaer Polytechnic Institute)
09:00   2384   Metal CMP Optimization Based on Chemically Formed Thin Film Analysis G. B. Basim (Ozyegin university)
09:20   2385   Comparison of the Electrochemical Polishing of Copper and Aluminum in Acid and Acid-Free Mediums T. M. Abdel-Fattah and J. Loftis (Christopher Newport University)
09:40 Intermission (20 Minutes)
 

Alternative Channel Technologies

Co-Chair(s): A. Dimulas and E. Simoen
TimeAbs#Title and Authors
10:00   2386   Epitaxial Ge on Standard STI Patterned Si Wafers: High Quality Virtual Substrates for Ge pMOS and III/V nMOS R. Loo, G. Wang, L. Souriau (IMEC), J. Lin (TSMC), G. Brammertz and M. Caymax (IMEC)
10:30   2387   Challenges and Progress in Germanium-on-Insulator Materials and Device Development Towards ULSI Integration E. Augendre (CEA LETI), L. Sanchez, L. Benaissa, T. Signamarcheix (CEA LETI MINATEC), J. Hartmann (CEA-LETI), C. Le Royer, M. Vinet (CEA LETI MINATEC), W. Van Den Daele (IMEP-INP Grenoble-Minatec), J. Damlencourt, P. Batude, C. Tabone, F. Mazen, A. Tauzin, N. Blanc, M. Pellat, J. Dechamp, M. Zussy, P. Scheiblin, M. Jaud (CEA LETI MINATEC), C. Drazek, C. Maurois, M. Piccin, A. Abbadie, F. Lallement, N. Daval, E. Guiot, A. Rigny, B. Ghyselen, K. Bourdelle (SOITEC), F. Boulanger (CEA LETI MINATEC), S. Cristoloveanu (IMEP-INP Grenoble-Minatec), T. Billon, O. Faynot, C. Deguet (CEA LETI MINATEC) and L. Clavelier (CEA-LETI-MINATEC)
11:00   2388   Comprehensive Study of the Fabrication of SGOI Substrates by the Ge Condensation Technique: Oxidation Kinetics and Relaxation Mechanism L. Souriau, G. Wang, R. Loo, M. Caymax, M. Meuris, M. M. Heyns and W. Vandervorst (IMEC)
11:20   2389   Analysis of the Substrate Current in Ge pMOSFETs V. O. Todi (University of Central Florida), E. Simoen, G. Eneman, C. Claeys (IMEC) and K. Sundaram (University of Central Florida)
11:40   2390   Schottky-Barrier Reduction of Platinum-Germanide-Contacts by RTA Diffusion of P Dopants C. Henkel, S. Abermann (Vienna University of Technology), O. Bethge (Institute for Solid-State Electronics) and E. Bertagnolli (Vienna University of Technology)
 
Co-Chair(s): A. Dimoulas and E. Simoen
TimeAbs#Title and Authors
14:00   2391   Millisecond Flash Lamp Annealing of Ultrashallow Implanted Layers in Ge M. Posselt, C. Wündisch, B. Schmidt, T. Schumann, A. Mücklich, W. Skorupa (Forschungszentrum Dresden-Rossendorf), T. Clarysse (IMEC Leuven), E. R. Simoen (IMEC) and H. Hortenbach (Qimonda and CNT Dresden)
14:30   2392   High Performance InGaAs MOSFETs with High Mobility using InP Barrier Layer J. Lee (The University of Texas at Austin), H. Zhao, Y. Chen, J. Yum, F. Xue, F. Zhou and Y. Wang (The Univiversity of Texas)
15:00   2393   Computation from Devices to System Level Thermodynamics S. Shankar (Intel Corporation), V. Zhirnov and R. Cavin (Semiconductor Research Corporation)
15:30 Intermission (20 Minutes)
 
Co-Chair(s): E. Simoen and A. Dimoulas
TimeAbs#Title and Authors
15:50   2394   Electrothermal Transport in Carbon Nanostructures T. Yamada, T. Saito, D. Fabris, P. Wilhite and C. Y. Yang (Santa Clara University)
16:20   2395   Dopant Segregated Schottky Source/Drain for Germanium p-MOSFETs with Metal Gate/High-k Dielectric Stack P. S. Lim (National University of Singapore), D. Chi (Institute of Materials Research and Engineering Singapore), G. Lo (Institute of Microelectronics Singapore) and Y. Yeo (National University of Singapore)
16:40   2396   High Performance Germanium n+/p and p+/n Diodes Using Low Temperature Metal Induced Dopant Activation and La2O3 Passivation A. Dimoulas, P. Tsipas (NCSR), T. Speliotis (Institute of Materials Science) and V. Loannou-Sougleridis (NCSR)
17:00   2397   Quasi-ballistic Transport of Charge Carriers in Nanometer FETs in the Model of Heterogeneous Channel V. P. Popov (Institute of Semiconductor Physics)
 

Friday, October 9, 2009

Hall N, Level 01 - Green

Emerging Technologies

Co-Chair(s): M. Lemme and R. Harris
TimeAbs#Title and Authors
08:00   2398   Charge Storage Characteristics of Hybrid Nanodots Floating Gate S. Miyazaki, K. Makihara and M. Ikeda (Hiroshima University)
08:30   2399   Emerging Nonvolatile Memories by Exploiting Redox Reactions on the Nanoscale R. Waser (FZ Juelich)
09:00   2400   Annealing Reaction for Ni Silicidation of Si Nanowire H. Arai (Frontier Research Center, Tokyo Institute of Technology), H. Kamimura, S. Sato, K. Kakushima, P. Ahmet, K. Tsutsui, N. Sugii, K. Natori, T. Hattori and H. Iwai (Tokyo Institute of Technology)
09:20   2401   Carbon Nanotube Memory Devices: Mass-Fabrication and Electrical Characterization U. Schwalke (Darmstadt University of Technology) and L. Rispal (Technische Universitaet Darmstadt)
09:40 Intermission (20 Minutes)
 
Co-Chair(s): R. Harris and M. Lemme
TimeAbs#Title and Authors
10:00   2402   Tunnel Field-Effect Transistors for Future Low-Power Nanoelectronics A. S. Verhulst, W. G. Vandenberghe, D. Leonelli, R. Rooyackers, A. Vandooren, S. De Gendt, M. M. Heyns and G. Groeseneken (IMEC)
10:30   2403   Physics of Nanocontact Between Si Quantum Dots and Inversion Layer S. Nomura, Y. Sakurai, Y. Takada, K. Shiraishi (University of Tsukuba), M. Muraguchi, T. Endoh (Tohoku University), M. Ikeda, K. Makihara and S. Miyazaki (Hiroshima University)
11:00   2404   3D Suspended Nanowires Integration for CMOS and Beyond T. Ernst, K. Tachi, E. Saracco, A. Hubert, C. Dupré, S. Bécu (CEA-LETI), N. Vulliet (STMicroelectronics), E. Bernard, P. Cherns, V. Maffini-Alvaro (CEA-LETI), J. Damlencourt (CEA LETI MINATEC), C. Vizioz, J. Colonna, C. Bonafos and J. Hartmann (CEA-LETI)
11:30   2405   Graphene Nanoelectronics for Next Generation Post-CMOS Logic Switches C. Sung (IBM)
 
Co-Chair(s): M. Lemme and R. Harris
TimeAbs#Title and Authors
14:00   2406   Physics of Nanointerfaces and Nanostructures for Future Si Nanodevices K. Shiraishi (University of Tsukuba)
14:30   2407   Synthesis and Devices of Graphene J. Zhu, W. Liu, Y. Wang, B. Huang, Y. Xie and J. Woo (UCLA)
15:00   2408   Novel Materials and Integration Schemes for CMOS-Based Circuits for Flexible Electronics M. Quevedo (University of Texas), S. Gowrisanker, H. Alshareef, B. Gnade (UTD), D. Allee, S. Venugopal, R. Krishna and K. Kaftanoglu (ASU)
15:30   2409   Organic Semiconductor Lasers G. A. Turnbull (University of St Andrews)