Call for Papers: JSS Focus Issue

JSS CoverThis special issue of the ECS Journal of Solid State Science and Technology focuses on defect characterization in semiconductor materials and devices. We especially welcome papers in the following domains:

  • Structural, chemical, electrical and optical characterization of extended defects in semiconductor nano-structures and materials
  • Electrical and optical characterization of point defects in semiconductor nano-structures
  • Semiconductor-device-based defect analysis
  • Impact of (extended) defects on device and circuit operation and yield
  • Defect characterization and control in hetero-epitaxial layers and nano-structures grown on Si, comprising Ge, SiGe, GeSn, III-V and III-nitrides
  • Ab initio calculations and TCAD of the electrical activity of (extended) defects in semiconductor materials and devices
  • Defect control and mitigation strategies during hetero-epitaxial deposition

Find out more!

Submission Deadline | Oct. 21, 2015
Papers accepted into this focus issue are published online within 10 days of acceptance.
The issue is created online an article at a time with the final article published in March 2016.

Member Spotlight – Chennupati Jagadish

jagadishECS Fellow Chennupati Jagadish has been awarded the IEEE Nanotechnology Pioneer Award for his outstanding contributions to compound semiconductor nanowire and quantum dot optoelectronics.

Dr. Jagadish is a Laureate Fellow and Distinguished Professor at the Australian National University, where he has made major advances in compound semiconductor quantum dot and nanowire growth techniques and optoelectronic devices.

Previously, Dr. Jagadish was awarded the ECS Electronics and Photonics Division Award for his excellence in electronics research outstanding technical contribution to the field of electronics science.

Throughout his scientific career, Dr. Jagadish has published more than 620 research papers—some of which can be found in the Digital Library—and has 5 U.S. patents.

Some of Dr. Jagadish’s current research focuses on nanostructured photovoltaics, which provides novel concepts to produce a more efficient solar cell.

riceuniversity

Researchers were able to deform the molybdenum disulfide without breaking it.
Image: Nano Letters

Many labs have had their eye on molybdenum disulfide recently due to its promising semiconducting properties. Rice University has also turned its attention toward this 2D material and its interesting sandwich structure. During their studies, the researchers have concluded that under certain conditions, molybdenum disulfide can transform from the consistency of peanut brittle to that of taffy.

According to their research, the scientists state that when exposed to sulfur-infused gas at the right temperature and pressure, molybdenum disulfide takes on the qualities of plastic. This development has the potential to have a high impact in the world of materials science.

The structure of the molybdenum disulfide is similar to a sandwich, with layers of sulfur above and below the molybdenum atoms. When the two sheets join at different angles “defective” arrangements—or dislocations—are formed.

(more…)

Three Atom Thick Transistor

A new study by two ECS published authors, David Muller and Jiwoong Park, has led to an electronic piece that is just three atoms thick.

The researchers have unveiled a process to develop ultra-thin transistors made from TMD, otherwise known as transition metal dichalcogenide. This material is novel in the fact that it possesses properties that make it a perfect fit for solar cells, light detectors, or semiconductors.

Researchers have been examining TMDs for some time now, but have been finding it difficult to get them to work consistently. This new study has discovered the best process yet to manufacture the materials, which could lead to a breakthrough in the future of electronics and possibly bring about an end to Moore’s law.

(more…)

Water Helps Form Tiniest Wires Ever

The nanowires were created through a process called meniscus-mask lithography.Image: Tour Group/Rice University

The nanowires were created through a process called meniscus-mask lithography.
Image: Tour Group/Rice University

Scientists and researchers around the world are always looking for ways to improve technology. While we’ve been making smaller circuits to improve semiconductors for some time now, we’ve just about reached the physical limits of shrinking nanowires. However, this newly developed technique allows for the formation of the tiniest wires yet.

A new technique has been developed that uses water to create patterns of wires less than 10 nanometers wide.

“This could have huge ramifications for chip production since the wires are easily made to sub-10-nanometer sizes,” said lead author James M. Tour. “There’s no other way in the world to do this en masse on a surface.”

(more…)

Silicon is the common material used in solar cells and computer chips, but gallium arsenide is an alternative material with many advantages. Image: YouTube/Stanford University

Silicon is the common material used in solar cells and computer chips, but gallium arsenide is an alternative material with many advantages.
Image: YouTube/Stanford University

When we think of chips and solar cells, we think of silicon. However, silicon isn’t the only chip-making material out there.

Researchers from Stanford University are turning their attention away from silicon and are looking toward gallium arsenide to make faster chips and more efficient solar cells.

Gallium arsenide is a semiconductor material with extraordinary properties. Electrons can travel six times faster in gallium arsenide than in silicon, allowing for faster operation of transistors. Unfortunately, cost effectiveness is not one of gallium arsenide’s alluring properties—which has caused researchers to opt for the much cheaper and less effective silicon material.

One single wafer of gallium arsenide could cost up to $5,000, whereas the same size wafer of silicon costs only $5.

(more…)

Member Spotlight – Jim Edgar

Edgar's new patented process will allow for the building of better semiconductors.Source: Kansas State University

Edgar’s new patented process will allow for the building of better semiconductors.
Source: Kansas State University

The Electrochemical Society’s Jim Edgar has developed a new process to build better semiconductors, which will vastly improve the efficiency of electronic devices and help propel the semiconductor industry.

Edgar, a Kansas State university distinguished professor of chemical engineering and an active member of ECS since 1981, has just received a patent for his “Off-axis silicon carbide substrates” process, which is a way to build a better semiconductor. This new process could mean big things for the electronics and semiconductor manufacturing industries.

“It’s like a stacked cake separated by layers of icing,” Edgar said. “When the layers of semiconductors don’t match up very well, it introduces defects. Any time there is a defect, it degrades the efficiency of the device.”

(more…)

IBM Contracts Company to Take Chip Unit

IBM reported that they will be getting out of the chip making business in order to give more attention to cloud computing and big data analytics.

The company will pay Globalfoundries $1.5 million over the next three years to take control of chip operations.

“They need to narrow their focus, get their A-game on, and any distractions from a core business perspective, such as this deal, need to be put in the rear-view mirror,” FBR Capital Markets analyst Daniel Ives told Reuters.

This is not the first notion of IBM reducing its presence in the hardware industry. Earlier this month, the company sold its x86 server business to Lenovo Group Ltd. For $2.1 billion.

This from Reuters:

Globalfoundries Chief Executive Sanjay Jha said the company would invest $10 billion between 2014 and 2015 to develop 10 nanometer, 14 nanometer and radio-frequency technologies.

Read the full article here.

What does the future hold for IBM? Connect with us to join us in the discussion.

The researchers discovered that two flat semiconductor materials can be connected edge-to-edge with crystalline perfection.Credit: University of Washington

The researchers discovered that two flat semiconductor materials can be connected edge-to-edge with crystalline perfection.
Credit: University of Washington

Current member of ECS, Xiaodong Xu, has made a huge contribution to the field of electrochemical science with the creation of atomically seamless, thinnest-possible semiconductor junctions.

Xu, along with the scientists at the University of Washington, believe their semiconductor – coming in at only three atoms thick – is the most slender possible, a new class of nanoscale materials.

This from the University of Washington:

The University of Washington researchers have demonstrated that two of these single-layer semiconductor materials can be connected in an atomically seamless fashion known as a heterojunction. This result could be the basis for next-generation flexible and transparent computing, better light-emitting diodes, or LEDs, and solar technologies.

Read the full article here.

“Our experimental demonstration of such junctions between two-dimensional materials should enable new kinds of transistors, LEDs, nanolasers, and solar cells to be developed for highly integrated electronic and optical circuits within a single atomic plane,” Xu said.

The research was published online this week in Nature Materials.

Find more research from Xu published in our Digital Library.

CSTIC 2015 Call for Papers

CSTIC

Plan now to participate at CSTIC 2015, one of the largest and the most comprehensive annual semiconductor technology conferences in China.

We invite you to submit your papers now for the China Semiconductor Technology International Conference 2015, one of the largest and the most comprehensive annual semiconductor technology conferences in China. CSTIC is organized by SEMI and IEEE, co-organized by China’s High-Tech Expert Committee (CHTEC). It is co-sponsored by ECS, MRS and China Electronics Materials Industry Association. CSTIC 2015 will be held on March 15-16, 2015 at the SHICC, Shanghai, China, in conjunction with SEMICON China 2015. It will cover all the aspects of semiconductor technology and manufacturing, including devices, design, lithography, integration, materials, processes, manufacturing as well as emerging semiconductor technologies and silicon material applications. Hot topics, such as 3D integration, III-V semiconductors, carbon nanoelectronics, LEDs, and MEMS. And CPTIC 2015 has joined CSTIC 2015 as Symposium XII : Si Materials and Photovoltaic Technology.

We are soliciting papers from authors around the world on all aspects of semiconductor and photovoltaic technology and manufacturing, including semiconductor design, Frond-End-of-Line (FEOL), Back-End-of-Line (BEOL), packaging, testing, as well as emerging semiconductor technologies; photovoltaic market, policy, power grid, device, design, process, tooling, materials, and fundamental study between China and the rest of the world with a focus on industrial applications.

Submit your abstract online.

  • Page 2 of 2
    • 1
    • 2