203rd Meeting - Paris, France

April 27-May 2, 2003


G1 - Seventh International Symposium on Silicon Nitride and Silicon Dioxide Thin Insulating Films

Dielectric Science and Technology/Electronics/High Temperature Materials

Monday, April 28, 2003

Room 362/363, Level 3, Le Palais des Congres

Interface Characterization

Co-Chair: R. E. Sah

10:25 Introductory Remarks
10:30452 Electrical Characterization of Si-SiO2 and Semiconducting Polymer-SiO2 Interfaces - J. Deen (McMaster University)
11:00453 Si-SiO2 Interface Trap Properties and Dependence with Oxide Thickness and with Electrical Stress in MOSFET's with Oxides in the 1-2 nm Range - D. Bauza and F. Rahmoune (UMR-CNRS)
11:30454 EPR Studies of SiC/SiO2 Interfaces in n-type 4H and 6H Oxidized Porous SiC - J.L. Cantin, H.J. von Bardeleben, M. Mynbaeva, S.E. Saddow, Y. Shishkin, R.P. Devaty, and W.J. Choyke (University Paris 6)

Tuesday, April 29, 2003

Room 343, Level 3, Le Palais des Congres

Related Oxides/Modeling

Co-Chairs: S. Banerjee, M. J. Deen, and R. E. Sah

13:40455 Novel Ge Devices with High-k Dielectrics: High Performance MOSFETs and Optical Receivers - K. Saraswat, C. Chui, P. McIntyre, and B. Triplett (Stanford University)
14:10456 Properties of Ultrathin High-k Dielectrics on Si Probed by Electron Spin Resonance-Active Defects: Interfaces and Interlayers - A. Stesmans (University of Leuven)
14:40457 Role of Ultra Thin Silicon Dioxide Interfacial Layer in High Performance High Dielectric Constant Gate Dielectrics - R. Singh, M. Fakhruddin, K. Poole, S. Kondapi (Clemson University), J. Narayan (North Carolina State University), and S. Kar (Indian Institute of Technology)
15:10458 T.D. Callinan Award Adress- S.K. Banerjee: Quantum Mechanical Modeling of Capacitance-Voltage and Current-Voltage Behavior for SiO2 and High-k Dielectrics - L. Register, Y.-Y. Fan, S. Mudanai, and S. Banerjee (University of Texas)
15:40 Twenty-Minute Intermission
16:00459 Thermally Driven Atomic Transport in Silicon Oxynitride and High-k Films on Silicon - I.J.R. Baumvol, F.C. Stedile, J. Morais, C. Krug, C. Radtke, E.B.O. da Rosa, K.P. Bastos, R.P. Pezzi, L. Miotti, and G.V. Soares (Universidade Federal do Rio Grande do Sul)
16:30460 Modeling and Electrical Characterization of MOS Structures with Ultra Thin Oxide - R. Clerc and G. Ghibaudo (IMEP)
17:00461 Comparison of Contamination Effects in Silicon Oxide with that in Hafnium Oxide and Zirconium Oxide Gate Dielectrics - F. Shadman, P. Raghu, N. Rana, C. Yim (University of Arizona), and E. Shero (ASM America)
17:20462 Conduction Modeling of Thick Nitride/Oxide Dielectrics - S. Evseev (Philips Semiconductors)
17:40463 Charge Trapping in High-Dose Ge-Implanted and Si-Implanted Silicon-Dioxide Thin Film - A.N. Nazarov, I.N. Osiyuk, I.P. Tyagulskii, V.S. Lysenko (Institute of Semiconductor Physics), T. Gebel, and W. Skorupa (Forschungszentrum Rossendorf)

Hall Maillot, Level 2, Le Palais des Congres

Technical Exhibit and Tuesday Evening Poster Session

o464 Stress Control of Hydrogenated Amorphous Silicon Nitride Films Deposited by Plasma-Enhanced Chemical Vapor Deposition - H. Gamo, H. Eguchi, T. Kurosu (Toppan Printing Co., Ltd.), K. Nakagawa (National Institute for Materials Science), M. Nishitani-Gamo (University of Tsukuba), and T. Ando (National Institute for Materials Science)
o465 Optimization of Silicon Nitride Process for Post Copper CMP Nitride Barrier Film - Y.L. Cheng, Y.L. Wang, C.W. Liu (Taiwan Semiconductor Manufacturing Co.), J.K. Lan (National Chiao-Tung University), C.P. Liu (National Cheng-Kung University), S.A. Wu (Taiwan Semiconductor Manufacturing Co.), Y.L. Wu (National Chi-Nan University), K.Y. Lo (National Chiayi University), and M.S. Feng (National Chiao-Tung University)

Wednesday, April 30, 2003

Room 343, Level 3, Le Palais des Congres

Film Application,Device Characterization/Reliability

Co-Chairs: C.L. Claeys, W.D. Brown, and M.J. Deen

8:00466 What Can Low-frequency Noise Learn us About the Quality of Thin-gate Dielectrics? - E. Simoen, A. Mercha, and C. Claeys (IMEC)
8:30467 Analysis of Short-channel MOSFET Behavior after Gate Oxide Breakdown and its Impact on Digital Circuit Reliability - G. Groeseneken, B. Kaczer, and R. Degraeve (IMEC)
9:00468 Cyanide Treatment to Improve Electrical Characteristics of Si-based MOS Diodes with an Ultrathin Oxide Layer - H. Kobayashi (Osaka University)
9:30469 Process Dependence of Negative Bias Temperature Instability in PMOSFETS - S. Prasad, E. Li, and L. Duong (LSI Logic Corp.)
9:50 Twenty-Minute Intermission
10:10470 Silicon Dioxide Insulating Films for Silicon-Germanium Technology - V.J. Kapoor (The University of Toledo)
10:40471 New Reliability Issues of CMOS Transistors with 1.3nm Thick Gate Oxide - M.F. Li, B.-J. Cho, G. Chen, W.-Y. Loh (National University of Singapore), and D.-L. Kwong (The University of Texas at Austin)
11:10472 Improved Performance With Low Temperature Silicon Nitride Spacer Process - C. Reddy and S. Anderson (Motorola Inc.)
11:30473 Reliability and Failure Processes in Thin Silicon Dioxide - J. Stathis (IBM)

Interface Studies/Defects

Co-Chairs: H. Kobayashi, D. Misra, and R.E. Sah

13:40474 Growth of SiO_2 at the Sc2O3/Si(100) Interface During Annealing - E. Romain (Institut National Polytechnique de Grenoble), G. Botton (McMaster University), D. Landheer, X. Wu (National Research Council of Canada), M. Lee, and Z. Lu (University of Toronto)
14:10475 A Review of Defect Generation in the SiO2 and at Its Interface with Si - J. Zhang (Liverpool John Moores University)
14:40476 Dipoles in SiO_2: Border Traps or Not? - D. Fleetwood and J. Felix (Vanderbilt University)
15:10477 Stabilities and Electronic States of Incorporated Nitrogen Atoms at the Interface of SiO_2/Si(100) - T. Yamasaki and C. Kaneta (Fujitsu Laboratories Limited)
15:30 Twenty-Minute Intermission
15:50478 Electrical Properties and Reliability of Silicon Nitride Gate Dielectrics Formed by Various Process and Annealing - K.-S. Chang-Liao (National Tsing Hua University)
16:20479 Electronically Active Defects in Ultrathin Oxynitrides Produced using Plasma Nitridation - D.A. Buchanan (University of Manitoba)
16:50480 The 4H-SiC/SiO2 Interface - L.C. Feldman, S. Dhar, Y. Song (Vanderbilt University), J. Williams (Auburn University), G. Chung (Sterling Semiconductor, Inc.), and J.K. McDonald (Vanderbilt University)
17:20481 Characterization of Thin Films of Silicon Oxide and SiO2-Si Interface by Cathodoluminescent Method - M. Zamoryanskaya, V. Sokolov, I. Kotina, and S. Konnikov (Ioffe Phisico-Technical Institute)
17:40482 Predictive Simulation of Void Formation during the Deposition of Silicon Nitride and Silicon Dioxide Films - C. Heitzinger, A. Sheikholeslami (Technical University of Vienna, Austria), H. Puchner (Cypress Semiconductor), and S. Selberherr (Technical University of Vienna, Austria)

Thursday, May 1, 2003

Film Preparation and Characterization

Co-Chairs: K.S. Chang-Liao, K.B. Sundaram, and R.E. Sah

8:00483 Direct-Write Deposition of Silicon Oxide - The Express Lane towards patterned thin Films - H. Wanzenboeck, S. Harasek, E. Bertagnolli, M. Gritsch, H. Hutter, J. Brenner, H. Stoeri, U. Grabner, G. Hammer, and P. Pongratz (Vienna University of Technology)
8:30484 Comprehensive Optical and Compositional Characterization of Silicon-based Thin Films for Photonics - J. Wojcik, E.A. Irving, J.A. Davies (McMaster University), W.N. Lennard (The University of Western Ontario), and P. Mascher (McMaster University)
9:00485 Spatially Resolved Determination of Stress in Thin Films and Substrates from Curvature Measurements - N. Herres (Interstate University of Applied Sciences NTB Buchs)
9:30486 Hydrogenated Amorphous Silicon Nitride Deposited by Dc Magnetron Sputtering - K. Mokadem, M. Mostefa, M. Auocher, A.C. Chami, and M. Abdessalem (USTHB)
9:50 Twenty-Minute Intermission
10:10487 Properties of Annealed Silicon Oxynitride Layers for Optical Applications - K. Worhoff, C. Roeloffzen, G. Hussein, and L. Hilderink (University of Twente)
10:40488 Optimum Structure of Deposited Ultra Thin Silicon Oxynitride Film to Minimize Leakage Current - K. Muraoka, K. Kurihara, N. Yasuda, and H. Satake (Toshiba Corporation)
11:10489 Plasma Damage in Ultra-thin Gate Oxide Induced by Dielectric Deposition Processes: an Overview on Main Mechanisms and Characterization Techniques - J.-P. Carrere, J.-C. Oberlin, and S. Bruyere (ST Microelectronics)
11:40490 Electrical Characterization of Thin Oxide Layers by Impedance Spectroscopy Using Silicon/Oxide/Electrolyte (SOE) Structures. - M. Chemla (Universite Pierre et Marie Curie), V. Bertagna, R. Erre (Universite d'Orleans), F. Rouelle (Universite Pierre et Marie Curie), S. Petitdidier, and D. Levy (STMicroelectronics)

Scaling/Film Preparation and Characterization

Co-Chairs: D. Fleetwood, D. Landheer, and W.D. Brown

13:40491 Ultrathin Silicon Oxynitride Gate Dielectric Scaling - E. Gusev (IBM)
14:10492 Scaling Issues for Advanced SOI Devices: Gate Oxide Tunneling, Thin Buried Oxide, and Ultra-Thin Films - J. Pretet (STMicroelectronics), F. Dieudonné (IMEP/ENSERG), F. Allibert, N. Bresson (SOITEC SA), T. Matsumoto, A. Ohata (IMEP/ENSERG), T. Poiroux (CEA/LETI), J. Jomaah, and S. Cristoloveanu (IMEP/ENSERG)
14:40493 T.D. Callinan Award Adress- A.G. Revesz: The Effect of the Oxide Network Structure on the Irradiation Behavior of SiO2 Films on Silicon - A. Revesz (Revesz Associates) and H. Hughes (Naval Research Laboratory)
15:10494 Atomistic Characterization of Radical Nitridation Process on Si(100) Surfaces - Y. Yasuda, A. Sakai, and S. Zaima (Nagoya University)
15:40 Twenty-Minute Intermission
16:00495 Atomic, Electronic Structures and Charge Transport Mechanism in Silicon Nitride of Different Composition - V. Gritsenko (Institute of Semiconductor Physics) and K. Nasyrov (Institute of Automation and Electrometry)
16:30496 Decoupled Plasma Nitridation of Ultrathin Gate Oxides for 65 and 90nm technologies - M. Bidaud (Philips Semiconductors), J.-P. Carrere, F. Guyader, F. Boeuf (ST Microelectronics), and C. Dachs (Philips Semiconductors)
16:50497 A Neutron Reflectivity Study of Silicon Oxide Thin Film - V. Bertagna (Universite d'Orleans), A. Menelle (CEA Saclay), S. Petitdidier, D. Levy (STMicroelectronics), and M.-L. Saboungi (Centre de Recherche sur la Matiere Divisee)
17:10498 Rapid Thermal and Anodic Oxidations of LPCVD Silicon Nitride Films - L. Yen-Po and H. Jenn-Gwo (National Taiwan University)
17:30499 MOSFET Degradation with Reverse Biased Source and Drain During High-Field Injection through Thin Gate Oxide - B. Patel, R. Jarwal, and D. Misra (New Jersey Institute of Technology)

Friday, May 2, 2003


Co-Chairs: D. Landheer, M.J. Deen, and R.E. Sah

8:30500 Scanning Transmission Electron Microscopy Investigations of the Structure and Stability of Alternative Gate Dielectrics - S. Stemmer (University of California)
9:00501 Characteristics of Metal Gate MOS Capacitor with Hafnium Oxynitride Thin Film - K.-J. Choi and S.-G. Yoon (Chungnam National University)
9:20502 Contribution of Individual Process Steps on Particle Contamination during Plasma CVD Operation - H. Setyawan, M. Shimada, Y. Imajo, and K. Okuyama (Hiroshima University)
9:40 Twenty-Minute Intermission
10:00503 Plasma Nitridation Optimization for Sub-15A Gate Dielectrics - F. Cubaynes, J. Schmitz (Philips Research Leuven), C. van der marel, H. Snijders (Philips Center for Industrial Technology), A. Veloso, A. Rothschild (IMEC), C. Olsen, and L. Date (AMAT)
10:20504 Recovery and Reversibility of Electrical Instabilities in Double-layer Dielectrics - S. Evseev and A. Cacciato (Philips Semiconductors)
10:40505 Low-Temperature Oxidation for Gate Dielectrics of Poly-Si TFTs using High-Density Surface Wave Plasma - K. Azuma, M. Goto, T. Okamoto, and Y. Nakata (Advanced LCD Technical Development Center Co., Ltd.)
11:00506 Characterization of MIs Tunnel Junctions by IETS - C. Petit (Universite de Reims), G. Salace (Universitede Reims), and D. Vuillaume (IEMN)
11:20 Closing Remarks