203rd Meeting - Paris, France

April 27-May 2, 2003


K1 - Advanced Short-Time Thermal Processing for Si Based CMOS Devices

Electronics/Dielectric Science and Technology/High Temperture Materials

Monday, April 28, 2003

Room 341, Level 3, Le Palais des Congres

Advances in Rapid Thermal Processing Equipment

Co-Chairs: B. Peuse and F. Roozeboom

10:20879 Temperature Measurement and Control for RTP Meeting the Challenges of Advanced Device Structures - B. Peuse (Mattson Technology, Inc.)
10:45880 Intra-die Temperature Non Uniformity Related to Front Side Emissivity Dependence During Rapid Thermal Annealing - C. Laviron (LETI), R. Lindsay (IMEC), A. Michallet, A. Halimoui (ST Microelectronics), and E. Granneman (ASM International)
11:00881 Pattern Effects During Spike Annealing of Ultra Shallow Implants - J. Niess, Z. Nenyei, W. Lerch, and S. Paul (Mattson Thermal Products GmbH)
11:15882 Lightpipe Proximity Effects on Si Wafer Temperature in Rapid Thermal Processing Tools - K.G. Kreider, D.H. Chen, D.P. DeWitt, W.A. Kimes, and B.K. Tsai (National Institute of Standards and Technology)
11:30883 Time Resolved Analysis of fRTP™ Thermal Pulse Prgression in SOI and Bulk Silicon Wafers - K. Elliott (Vortek Indusries), J. Ross, S. McCoy, J. Gelpey (Vortek Industries), R. Tichy, and L. Larson (International SEMATECH)
11:45884 A Novel Hot Wall Furnace-Based RTP System With Sequenced Hydrogen And Wet-Hydrogen Ambient Gases For Advanced Dielectric Applications: Processing And Characterization - Y. Liu and J. Hebb (Axcelis Technologies)

Ultra-Shallow Source/Drain Junctions by Ion-Implantation and Rapid Thermal Annealing

Co-Chairs: J. Hebb, I. Yamada, and P. Timans

13:30885 Junction Scaling Technology for the Sub 90nm Node - J. Hwang, H. Kennel, M. Liu, and P. Packan (Intel Corporation)
13:55886 Rapid Thermal Solid Phase Epitaxy Annealing for USJ Formation - W. Lerch, S. Paul (Mattson Thermal Products GmbH), D.F. Downey, and E.A. Arevalo (Varian Semiconductor Equipment Associates)
14:10887 Cluster Ion Beam Process Technology - I. Yamada (Himeji Institute of Technology)
14:35888 A First Principles Examination of the Diffusion of Boron in Silicon during Microwave Rapid Thermal Processing - K. Thompson, J. Booske, R. Cooper, and C. Bonifas (University of Wisconsin)
14:50889 Rapid and Contactless Implantation Damage Analysis by a Microwave Diagnostic - R. Ahrenkiel (National Renewable Energy Laboratory) and B. Lojek (Atmel Corporation)
15:05890 Structure and Thermal Evolution of Small Clusters Found in Ultra Low Energy High Dose Boron Implanted Silicon - X. Hebras, F. Cristiano, N. Cherkashin (Pole Implantation Ionique), B. Pawlak (Philips Research Lab), and W. Lerch (Mattson Thermal Products)
15:20891 Relation Between Thermal Evolution of Interstitial Defects and Transient Enhanced Diffusion in Silicon - A. Claverie, F. Christiano, B. Colombeau, X. Hebras, P. Calvo, N. Cherakshin, E. Scheid, and B. de Mauduit (Pole Implantation Ionique)
15:45 Fifteen-Minute Intermission

Ultra-Shallow Source/Drain Junctions by Ion-Implantation and Rapid Thermal Annealing (cont'd)

Co-Chairs: J. Hebb, I. Yamada, and P. Timans

16:00892 Ultra-shallow Junction Formation Using Ion Implantation and Conventional Spike Anneal in a Hot-wall RTP System - J. Hebb, A. Agarwal, and M. Ameen (Axcelis Technologies, Inc.)
16:25893 Performance Enhancements for 50 NM PMOS by Angled PAI and F Implants - P.R. Chidambaram, S. Ekbote, S. Chakravarthi, A. Chatterjee, C. Machala, and S. Johnson (Texas Instruments)
16:40894 Fluorine Co-Implantation Schemes for 65 NM and Below Ultra-Shallow Junctions - D.F. Downey, E.A. Arevalo (Varian Semiconductor Equipment Associates), and K. Thompson (University of Wisconsin)
16:55895 The Role of F with Ge Pre-Amorphisation in Forming pMOS Junctions for the 65 nm CMOS Technology Node - B.J. Pawlak (Philips Research Leuven), R. Lindsay (IMEC), R. Surdeanu (Philips Research Leuven), X. Pages (ASM International), W. Vandervorst (IMEC), and K. v.d. Jeugd (ASM International)
17:10896 Dose Loss and Diffusion in BF2 Implanted Silicon during Rapid Thermal Anneal - O. Dokumaci, P. Ronsheim, and S. Hegde (IBM)
17:25897 Ultra-Shallow Implant Anneal using Short Wavelength Flash Light Source - W.S. Yoo and K. Kang (WaferMasters, Inc.)
17:40898 Rapid Thermal Processing in Silicon: Microelectronics to Solar Cells - B. Sopori (National Renewable Energy Laboratory), A. Fiory, and N. Ravindra (New Jersey Institute of Technology)

Tuesday, April 29, 2003

Ultra-Shallow Source/Drain Junctions by Alternative Doping and Annealing Methods

Co-Chairs: F. Roozeboom and J. Hwang

8:00899 Electrical Characterization of Silicon Diodes Formed by Laser Annealing of Implanted Dopants - L.K. Nanver, J. Slabbekoorn, T. Scholtes (TU Delft), R. Surdeanu (Philips Research Leuven), C. Ortiz, F. Simon (MicroLas Lasersystem GMBH), H.J. Kalhert, and J.W. Slotboom (TU Delft)
8:25900 Modelisation and Experimental Results on Laser Thermal Processing for Ultra-Shallow Junction Formation - J. Venturini, M. Hernandez, D. Zahorski (SOPRA), G. Kerrien, T. Sarnet, D. Débarre, J. Boulmer (Universite Paris Sud), C. Laviron, M.N. Semeria, J.L. Santailler, and D. Camel (CEA-DRT)
8:40901 Excimer Laser Annealing: A Solution for the Future Technology Nodes? - V. Privitera, G. Mannino, A. La Magna (CNR-IMM), G. Fortunato, L. Mariucci (CNR-IFN), and B.G. Svensson (University of Oslo)
8:55902 Ultra-Shallow Junction Formation by Gas Immersion Laser Doping (GILD) - M. Hernandez (SOPRA), T. Sarnet, D. Debarre, J. Boulmer, G. Kerrien (Universite Paris Sud), C. Laviron, and M.N. Semeria (CEA/DRT/LETI/DTS)
9:10903 Room Temperature Migration of B Implanted in Laser Irradiated Si - G. Mannino, V. Privitera (CNR-IMM), G. Fortunato, L. Mariucci (CNR-IFN), and E. Napolitani (Univesita di Padova)
9:25904 Sidewall Grooving on CoSi2 Narrow Lines - O. Chamirian (Katholieke Universiteit Leuven), M. de Potter, A. Lauwers, O. Richard, R. Lindsay, C. Vrancken (IMEC), and K. Maex (Katholieke Universiteit Leuven)
9:40905 Metal Interconnect Technologies for CMOS ULSI - T. Kikkawa (Hiroshima University)
10:05 Fifteen-Minute Intermission

Advanced Contacts to Ultra-Shallow Source/Drain Junctions

Co-Chairs: A. Lauwers and L.J. Chen

10:20906 High Resolution Investigation of Atmic Interdiffusion During DURING Co/Ni/Si Phase Transition - A. Alberti, C. Bongiorno, F. La Via, and C. Spinella (CNR-IMM)
10:35907 Silicide Scaling : Co, Ni, or CoNi ? - A. Lauwers (IMEC), J.A. Kittl (Texas Instruments), A. Akheyar (Infineon), M. Van Dal (Philips Research Leuven), O. Chamirian, M. de Potter, R. Lindsay, and K. Maex (IMEC)
11:00908 Ni Based Silicides: Material Issues for Advanced CMOS Applications - J.A. Kittl, A. Lauwers, O. Chamirian (IMEC), M. Van Dal (Philips Research Leuven), A. Akheyar, M. de Potter, R. Lindsay, and K. Maex (IMEC)
11:15909 Study on Ge/Si Ratio and Formation of Ni/ P+Si1-xGex and Ni/Si/P+Si1-xGex - T.-H. Yang, E.Y. Chang (National Chiao Tung University), T.-Y. Yang (Tatung University), H.-C. Tseng (United Microelectronics Corporation), H.-Y. Chen, and C.-Y. Chang (National Chiao Tung University)
11:30910 The Study of Nickel Silicide Film on Dielectric by Nickel and Tantalum Alloy - D. Lee, K. Do, D.C. Suh, D.-H. Ko, J.-H. Ku, S. Choi, and C.-W. Yang (Yonsei University)
11:45911 Advances in Low Temperature Processing in a Hot Wall RTP system - J. Hebb, J. Willis, P. Frisella, and A. Agarwal (Axcelis Technologies, Inc.)

Advanced Gate Stacks I

Co-Chairs: E. Gusev and M.L. Green

13:30912 Application of High K Dielectrics in CMOS Technology and Emerging New Technology - R. Liu (Macronix International Co., Ltd.) and T.-B. Wu (National Tsing Hua University)
13:55913 Growth and Characterization of Al2O3:HfO2 Nanolaminate Films Deposited by Atomic Layer Deposition (ALD) - C.P. D'Emic, E. Gusev, M. Copel, J. Newbury, P. Kozlowski, and J. Bruley (IBM)
14:10914 ALD HfO2 Gate Dielectric: Growth Behavior and Scaling Limits - M.L. Green, M.A. Alam, and G.D. Wilk (Agere Systems)
14:24915 First Principles Modelling of High-k Dielectric Films: Deposition and Thermal Stability - S. Elliott, S. Monaghan, H. Pinto, and J. Greer (University College)
14:50916 Pathways for Advanced Transistors Using Hafnium-Based Oxides by Atomic Layer Deposition - A.R. Londergan, S. Ramanathan, J. Winkler, T.E. Seidel (Genus, Inc.), J. Gutt, G. Brown, and R.W. Murto (International Sematech)
15:05 Fifteen-Minute Intermission

Applications of SiGe Alloys in Future Device Technologies

Co-Chairs: J.C. Gelpey and M.C. Ozturk

15:20917 Development of 12 A Plasma Nitrided Gate Dielectrics through Correlation of Process, Physical, and Electrical Parameters - G. Miner, P. Kraus, T.-C. Chua, J. Holland, C. Olsen, K. Ahmed, A. Hegedus, S. Hung, F. Nouri (Applied Materials), A. Herrera-Gomez (CINVESTAV-Querétaro), A. Lepert, and P. Meissner (Applied Materials)
15:45918 Advanced Layer-by-Layer Annealing and Deposition Process for High-Quality High-k Dielectrics Formation - K. Iwamoto (Assosiation of Super-Advanced Electronic Technolodies)
16:00919 Rapid Thermal Annealing of Hf-Silicate/Polysilicon Dielectric Layers Deposited by Atomic Layer Deposition - C. Rittersma, D. Massoubre (Philips Research Leuven), F. Roozeboom, M. Verheijen, J. van Berkum, Y. Tamminga, T. Dao, H. Snijders (Philips Research), E. Tois, L. Vainonen-Ahlgren, M. Tuominen, and S. Haukka (ASM Microchemistry)
16:15920 Characterization of High-K Hf-Silicate Gate Dielectric Film Systems Processes by RTA, Spike, and Flash Anneal - R. Tichy, P. Lysaght, B. Foran, G. Besuker, L. Larson, and H. Huff (International SEMATECH)
16:30921 High-k Dielectric Processing for Ge-Channel MOSFETs - P. McIntyre (Stanford University)
16:55922 Fabrication of SiGe-on-Insulator Substrates for High-performance Strained SOI-MOSFETs by Ge-Condensation Technique - T. Tezuka, N. Sugiyama, T. Mizuno, S. Nakaharai, and S. Takagi (MIRAI-ASET)
17:20923 MOSFET Channel Engineering using Strained Si, SiGe, and Ge Channels - E. Fitzgerald, M. Lee, C. Leitz, and D. Antoniadis (Massachusetts Institute of Technology)
17:45924 Self-Assembled Silicide Quantum Dots on Epitaxial Si-Ge Layers on (001)Si - L.J. Chen (National Tsing Hua University)

Hall Maillot, Level 2, Le Palais des Congres

Technical Exhibit and Tuesday Evening Poster Session

Co-Chairs: L.J. Chen, E. Gusev, and D.L. Kwong

o925 Rapid Thermal Annealing of the Tantalum Silicate Thin Films Formed by Metalorganic Decomposition - K.M.A. Salem, H. Fukuda, and S. Nomura (Muroran Institute of Technology)
o926 Investigation of HfO_2 Dielectrics for Inter-Poly Dielectrics and Metal-Insulator-Metal Capacitors - T.-H. Perng (National Chiao-Tung University), C.-H. Chien (National Nano Device Laboratories), C.-W. Chen, and C.-Y. Chang (National Chiao-Tung University)
o927 The Atomic Alloying Nano Laminate by ALCVD for MIM CAP within IC BEOL and Metal Gate Oxide Candidate for EOT < 9 Angstrom - L. Girardie (MEMSCAP SA), S. Haukka, and E. Vainonen-Ahlgren (ASM Microchemistry Ltd)
o928 Batch ALD for MIM Capacitors - G.J. Snijders, S. Beulens, L. Vandezande, R. Wilhelm, and A. Hasper (ASM Europe bv.)
o929 Electrical Characterization of Thick Localized SOI Substrates Manufactured by Rapid Thermal Processing for High Voltage Integrated Circuits - O. Gonnard (CEA-LETI), S. Roux (Motorola Semiconducteurs), F. Bernizet, M. Bafleur, and J.-M. Dilhac (LAAS-CNRS)
o930 Design of Experiment on the Co Salicide Process : Impact of Thickness and Anneals on Main CMOS Parameters - F. Wacquant, C. Regnier, M.-T. Basso, and C. Julien (STMicroelectronics)
o931 New Metal Gate Architecture Achieved by Chemical Vapor Deposition for a Complete Tunnel Fill - C. Régnier, F. Wacquant, F. Leverd, S. Harrison, P. Coronel, and T. Skotniki (STMicroelectronics)
o932 Rapid Thermal Process Atomic Layer Deposition of High Dielectric Constant Ultra Thin ZrO2 for sub 65 nm Silicon CMOS Technology - M. Fakhruddin, R. Singh, K. Poole, S. Kondapi (Clemson University), and S. Kar (Indian Institute of Technology)
o933 Co-Silicide, Co(Ni)-Silicide and Ni-Silicide to Source/Drain Contact Resistance - A. Akheyar (Infineon Technologies), A. Lauwers (IMEC), J.A. Kittl (Affiliate researcher at IMEC from Texas Instruments), M. De Potter (IMEC), M. Van Dal (Philips Research Leuven), R. Lindsay (IMEC), G. Tempel (Infineon Technologies), and K. Karen (IMEC)
o934 Ultrathin Plasma Nitrided Oxide Gate Dielectrics for sub 100nm Generation CMOS Technology - J. Jeon (AMD)
o935 Silicon Damage and Dopant Behaviour Studies of Rapid Thermally Processed Ion Implanted Arsenic in Silicon - D. Girginoudi, N. Georgoulas, A. Thanailakis (Democritus University), and E. Polychroniadis (Aristotle University of Thessaloniki)

Wednesday, April 30, 2003

Room 251, Level 2, Le Palais des Congres

Advanced Gate Stacks II

Co-Chairs: D.L. Kwong, G. Miner, and D. Gilmer

13:30936 The Diffusion, Activation, and Microstructure Evolution of Phosphorus Implanted into Polysilicon - L. Adam, Y. Wang, C. Machala, and M. Mansoori (Silicon Technology Development)
13:45937 Roadblocks and Detours for Poly-Silicon/Metal-Oxide Integration - D. Gilmer, D. Triyoso, D. Roan, R. Cotton, J. Smith, R. Hegde, C. Hobbs, V. Dhandapani, R. Garcia, L. Dip, A. Franke, R. Rai, J. Grant, S. Samavedam, B. Taylor, H. Tseng, and P. Tobin (Motorola)
14:10938 Poly-Si Gate CMOS with Hafnium Silicate Gate Dielectric - C. Hobbs, J. Grant (Motorola), S. Kher (Applied Materials), V. Dhandapani, B. Taylor, L. Dip, R. Hegde (Motorola), C. Metzner (Applied Materials), H. Tseng, D. Gilmer, A. Franke, R. Garcia, L. Hebert, M. Azrak, D. Sing, T. Stephens, C. Scrogum, R. Rai, V. Becnel, J. Conner, B. White, and P. Tobin (Motorola)
14:25939 A Dual-Work Function Metal Gate Process Using Diffusion of Nitrogen from a Solid Source for Advanced CMOS Technologies - R. Lander, J. Hooker, J. Piscator (Philips Research Leuven), J. van Zijl, F. Roozeboom, M. Maas (Philips Research Laboratories), Y. Tamminga (Philips CFT), and R. Wolters (Philips Research Laboratories)
14:50940 Evaluation of CMOS Gate Metal Materials Using In Situ X-Ray Characterization - C. Cabral, Jr., C. Lavoie (IBM), A.S. Ozcan (Boston University), R.S. Amos, V. Narayanan, E. Gousev, J.L. Jordan-Sweet, and J.M.E. Harper (IBM)
15:15941 Selective Oxidation of Tungsten-Gate-Stacks in High Volume DRAM Production - G. Roters, S. Frigge, G. Feldmeyer, H.J. Meyer (Mattson Thermal Products GmbH), R. Hayn, E. Schroer, W. Kegel, and O. Storbeck (Infineon Technologies GmbH and Company)
15:30 Fifteen-Minute Intermission

Advanced Gate Stacks II (cont'd)

Co-Chairs: D. Gilmer and D.L. Kwong

15:45942 Effect of Starting Surface in Atomic Layer Deposition - S. Haukka, M. Tuominen, E. Vainonen-Ahlgren, E. Tois, and W.-M. Li (ASM Microchemistry Ltd.)
16:10943 Electron Trapping in the Conventional and Modified HfO2 ALD Gate Dielectrics - G. Bersuker, P. Zeitzoff, G. Brown, Y. Kim, A. Hou, and C. Lim (International SEMATECH)
16:25944 Atomic Layer Deposition Of High-K Metal Oxides for Gate and Capacitor Dielectrics - Y. Senzaki, S. Park, R. Higuchi, H. Chatham, L. Bartholomew, S. Al-Lami, C. Barelli, S.-I. Lee, and A. Helms, Jr. (ASML Thermal Division)
16:40945 Characterization of Mist Deposited HfSiO_4/SiOx/Si Structures - D. Lee (Primaxx, Inc.), K. Chang, K. Shanmugasundaram (Penn State University), P. Roman (Primaxx, Inc.), J. Shallenberger (Penn State University), P. Mumbauer, R. Grant (Primaxx, Inc.), and J. Ruzyllo (Penn State University)
16:55946 Modeling of HfO_2 Film Deposition from Hf(MMP)4 - A. Kagatsume, T. Yano, T. Fujimoto, M. Hoshino, T. Watanabe (Hitachi, Ltd.), M. Asai, S. Horii, H. Miya (Hitachi Kokusai Electric Inc.), M. Kamiya, and K. Hirao (University of Tokyo)
17:10947 Hf02 Films by UV Assisted and Thermal Injection Liquid Source MOCVD - P.K. Hurley, B.J. O'Sullivan, M. Modreanu (University College), F. Roussel, H. Roussel, M.A. Audier, C. Jimenez, J.P. Senateur (INPG), H. Davies, S. Rushworth (EPICHEM), I.W. Boyd, Q. Fang (University College), and H. Guillon (JIPELEC)
17:25948 Performance of Nitrided Hf Silicate High k Gate Dielectrics - J. Jeon (AMD)
17:40949 Atomic Vapor Deposition of Complex High-k Thin Films for Sub-90 nm CMOS Devices - J. Lindner, M. Schumacher, P. Lehnen, S. Miedl, U. Weber, P.K. Baumann, and G. Strauch (Aixtron AG)