2004 Joint International Meeting

October 3-October 8, 2004


I1 - First International Symposium on Dielectrics for Nanosystems: Materials Science, Processing, Reliability and Manufacturing

Dielectric Science and Technology/Electronics/Electron Devices Society

Monday, October 4, 2004

South Pacific 1, Level 6, Mid Pacific Conference Center

Nanoelectronics Based Nanosystems 1

Co-Chairs: R. Singh and H. Iwai

10:00851 Introduction to Nanoscale Packaging and Systems - R. Tummala and Z.L. Wang (Georgia Institute of Technology)
10:40852 Process Integration of Highly Stable 1.25µm^2 6T-SRAM Cell with 45nm Gate Length Triple Gate FETs - K. Lee, J.-H. Yang, S. Maeda, Y.-S. Jin, J.-A. Choi, S.-G. Bae, Y.-H. Kim, J.-H. Ahn, M.-C. Sun, J.-H. Ku, H.-S. Rhee, Y.-S. You, J.-Y. Kim, B.-Y. Nam, C.-J. Kang, H.-K. Kang, and K.-P. Suh (Samsung Electronics Co., Ltd.)
11:20853 Advance Process Modules for Scaled ULSIs - T. Mogami (NEC Corporation)

Nanoelectronics Based Nanosystems 2

Co-Chairs: H. Iwai and D. Greenlaw

14:00854 SOI and Low-k in High-Volume Manufacturing - D. Greenlaw and S. Kruegel (Advanced Micro Devices)
14:40855 Gate Dielectric Impact for the 65nm Digital and Mixed Signal Platform Applications - B. Tavel (Philips Semiconductors)
15:20856 Ultra-High Speed and Low-Power SOI CMOS Technology with Body-Tied Hybrid Trench Isolation Structure - Y. Hirano, T. Ipposhi, D.H. Thai, T. Iwamatsu, T. Ikeda, M. Tsujiuchi, S. Maegawa, M. Inuishi, and Y. Ohji (Renesas Technology Corp.)
16:00 Twenty-Minute Intermission
16:20857 A 65 nm CMOS Technology Featuring Hybrid-ULK/Copper Interconnects - S. Nakai, S. Fukuyama, N. Misawa, M. Miyajima, T. Sugii, K. Watanabe (Fujitsu Limited), T. Nakamura, Y. Nakata, I. Sugiura, and E. Yano (Fujitsu Laboratories Ltd.)
17:00858 Double-Gate FinFET Innovation: From 3-Terminal to Flexible Threshold Voltage 4-Terminal - Y. Liu, M. Masahara, K. Ishii, and E. Szuki (National Institute of Advanced Industrial Science and Technology (AIST))
17:40859 Dielectrics in SI Nano-Devices Roles and Challenges - Q. Xiang, Z. Krivokapic, W. Maszara, and M.-R. Lin (Advanced Micro Devices, Inc.)

Tuesday, October 5, 2004

Novel Aplications

Co-Chairs: S. Keeney and H. Wshiward

08:00860 Plasma Activated Wafer Bonding for Thin Silicon-On-Insulator Substrate Fabrication - P. Lindner, S. Farrens, and V. Dragoi (EV Group)
08:40861 Domain Matching Epitaxy: A New Paradign for Epitaxial Growth of Oxides - J. Narayan (North Carolina State University)
09:20862 Deposition Conditions and Post Treatment of High-k Praseodymium and Lanthanum Oxide Dielectrics - G. Lippert, J. Dabrowski, P. Formanek, V. Melnik, R. Sorge, C. Wenger, P. Zaumseil, and H.J. Mussig (Innovations for High Performance Microelectronics)
09:40 Twenty-Minute Intermission
10:00863 All-printed flexible organic thin film transistors: Current Status and Outlook for the Future - V. Subramanian, J. Frechet, P. Chang, D. Huang, J. Lee, F. Liao, B. Mattis, S. Molesa, A. Murphy, D. Redinger, and S. Volkman (University of California, Berkeley)
10:40864 Three-Dimensional Interconnect Technology Using Polyimide Film and Gold for MMICs - S. Sugitani (NTT Photonics Laboratories)
11:20865 Novel Dielectric Structures for Optical Performance Enhancement in Deep Sub-micron CMOS Image Sensor - D.-N. Yaung, S.-G. Wuu, H.-C. Chien, T.-H. Hsu, C.-H. Tseng, J.-S. Lin, C.-H. Lo, C.-Y. Yu, C.-S. Tsai, and C.S. Wang (Taiwan Semiconductor Manufacturing Company)

Memory Applications

Co-Chairs: J. Narayan and V. Subramanian

14:00866 Dielectric Scaling Challenges and Approaches in Floating Gate Non-Volatile Memories - S. Keeney (Intel Corporation)
14:40867 Progress and Issues in Dielectric Materials for Sub-100nm DRAM Technology - K. Saino (Elpida Memory Inc.)
15:20868 High-K Materials For Tunnel Barrier Engineering In Future Memory Technologies - P. Blomme, B. Govoreanu, M. Rosmeulen (Imec), A. Akheyar (Infineon Technologies affiliated to Imec), L. Haspeslagh, J. De Vos, M. Lorenzini, J. Van Houdt, and K. De Meyer (Imec)
16:00 Twenty-Minute Intermission
16:20869 Low-k Dielectrics For DRAM Frontend-Of-Line And Mid-Of-Line - A. Birner, A. Klipp, K. Mümmler, A. Thies, and D. Weber (Infineon Technologies SC300 GmbH & Co OHG)
17:00870 Recent Progress in FET-type Ferroelectric Memories - H. Ishiwara (Tokyo Institute of Technology)
17:40871 Highly-oriented Crystallinity of ferroelectric layers for reliable FRAM capacitors - K. Maruyama, M. Tsukada, O. Matsuura, M. Kurasawa, H. Yamawaki, M. Kondo, K. Kurihara (Fujitsu Laboratories Ltd.), Y. Horii, and T. Eshita (Fujitsu Limited)

Wednesday, October 6, 2004


Co-Chairs: J. Kim and M. Engelhardt

10:00872 Extending the Reliability of SiO2-Based Dielectric to the Nanometer Limit - E.Y. Wu (IBM Microelectronics Division) and J. Sune (Universitat Autonoma de Barcelona)
10:40873 Hot carrier stress and breakdown impact on high-frequency MOSFET analog performance - L. Pantisano, D. Schreurs, B. Kaczer, E. Simoen, and G. Groeseneken (IMEC)
11:20874 Reliability Challenges for sub-90nm Technology Dielectrics - H. Puchner (Cypress Semiconductor)

Three Dimensional Integration

Co-Chairs: R. Tummala and H. Puchner

14:00875 Assessment of 3D for Future On-Chip Wiring and Novel System Solutions - M. Engelhardt (Infineon Technologies)
14:40876 Technology and Applications of Three-dimensional Integration - R. Reif, C.S. Tan, A. Fan, K.-N. Chen, S. Das, and N. Checka (Massachusetts Institute of Technology)
15:20877 High-Density 3-D Microsystem-in-Package Technology and its Application for Integrated CCD Micro-Camera Visual Inspection System - H. Yamada (Corporate Research & Development Center, Toshiba Corporation), T. Togasaki (Corporate Manufacturing Engineering Center, Toshiba Corporation), A. Sadamoto, and H. Sudo (Corporate Research & Development Center, Toshiba Corporation)
16:00 Twenty-Minute Intermission
16:20878 SOI CMOS Circuits for System-on-Chip (SoC) Application - J. Kim, J.-O. Plouchart, B.J. Gross, and T. Sandwick (IBM Semiconductor Research and Development Center)
17:00879 Dielectric Adhesive Wafer Bonding for Back-End Wafer-Level 3D Hyper-Integration - J.-Q. Lu, T.S. Cale, and R.J. Gutmann (Rensselaer Polytechnic Institute)

Thursday, October 7, 2004

Materials Science, Processing and Manufacturing 1

Co-Chairs: C. Lu and H. Iwai

08:00880 HfSiON Gate Dielectrics for Low-Stand-By Power CMOS Devices - K. Sekine, S. Inumiya, A. Kaneko, M. Sato, I. Hirano, T. Yamaguchi, K. Eguchi, and Y. Tsunashima (Toshiba Corporation)
08:40881 Characteristics of Self-Assembled Ultra-Low-k Porous Silica Films - Y. Oku, N. Fujii, K. Kohmura, K. Yamada (MIRAI-ASET), N. Hata, Y. Seino, R. Ichikawa (MIRAI-ASRC-AIST), N. Nishiyama, S. Tanaka (Osaka University, Graduate School of Engineering Science), H. Miyoshi, S. Oike, H. Tanaka (MIRAI-ASET), S. Takada, C. Negoro (MIRAI-ASRC-AIST), A. Nakano, T. Ogata, T. Goto, Y. Sonoda, A. Ishikawa (MIRAI-ASET), T. Yoshino (MIRAI-ASRC-AIST), H. Matsuo, K. Kinoshita (MIRAI-ASET), K. Ueyama (Osaka University, Graduate School of Engineering Science), and T. Kikkawa (Hiroshima University)
09:00882 Hydrogen/Deuterium Implantation For Si-Dielectric Interface In Nanoscale Devices - T. Kundu and D. Misra (New Jersey Insitute of Technology)
09:20883 Implant Nitridation - H.-J. Li, T. Rhoad, J. Saulters, M. Gardner, J. Peterson, and J. Gutt (International SEMATECH)
09:40 Twenty-Minute Intermission
10:00884 Manufacturing Solutions for Developing Processes and Tools for CVD/ALD of Dielectrics for Nanoelectronics - R. Singh, D. Damjanovic, H.K. Bolla, and K. Poole (Clemson University)
10:40885 ALD HfSiO High-k Dielectrics and CVD-TaN Metal Gate - U.I. Chung, S.G. Park, H.J. Cho, H.R. Lee, H.B. Park, T.S. Jeon, B.J. Jin, S.B. Kang, Y.G. Shin, and J.T. Moon (Samsung Electronics)
11:00886 A Study on Aluminum Gate La_2O3 nMISFET with Post Metallization Anneal - J.-A. Ng, S.-I. Ohmi, K. Tsutsui, and H. Iwai (Tokyo Institute of Technology)
11:20887 Time Dependent Dielectric Breakdown of Thermally Evaporated HfO2 for Nanoscale Devices - N. Chowdhury, R. Garg, and D. Misra (New Jersey Inst of Technology)
11:40888 Suppresion of Surface Micro-Roughness on Si(110) - K. Nii, M. Yamamoto, A. Teramoto, and T. Ohmi (New Industry Creation Hatchery Center, Tohoku University)

Materials Science, Processing and Manufacturing 2

Co-Chairs: K. Sekine and D. Misra

14:00889 Microstructure Evolution and Breakdown Mechanism Studies in MOSFET with Ultra Thin Gate Dielectrics in Nanometer Technology Era - C.Y. Lu (Macronix International Co., Ltd.), C.H. Tung (Institute of Microelectronics), and K.L. Pey (Nanyang Technological University)
14:40890 Atomic-Layer Deposition of Ultrathin Silicon Nitride for Sub-Tunneling Gate Dielectrics - A. Nakajima and S. Yokoyama (Hiroshima University)
15:20891 Thermally-Oxidized HfO_2 on Se-Passivated n-Type Si(100) - M. Tao, X. Yang, and W. Kirk (University of Texas at Arlington)
15:40892 Effects of Low temperature NH_3 treatment on HfO2/SiO2 stack gate dielectrics fabricated by MOCVD system - W.-T. Lu (Institute of Electronics, National Chiao-Tung University), C.-H. Chien (National Nano Device Laboratories), Y.-C. Lin (Institute of Electronics, National Chiao-Tung University), M.-J. Yang (National Nano Device Laboratories), and T.-Y. Huang (Institute of Electronics, National Chiao-Tung University)
16:00 Twenty-Minute Intermission
16:20893 Towards 0.5 nm EOT Scaling of HfO_2 / Metal Electrode Gate Stacks - J. Peterson, G. Brown, K. Matthews, J. Gutt, S. Gopalan, H.-J. Li, P. Kirsch, J. Barnett, N. Moumen, P. Majhi, N. Chaudhary, C. Young, B. Sassman, B.-H. Lee, G. Bersuker, P. Zeitzoff, P. Lysaght, M. Gardner, and H. Huff (International SEMATECH)
17:00894 Electrical conduction processes in Lanthana thin films prepared by E-Beam Evaporation - Y. Kim, S.-I. Ohmi, K. Tsutsui, and H. Iwai (Tokyo Institute of Technology)
17:20895 Innovative direct-deposition of dielectrics – the solution for express processing? - M. Fischer, S. Mueller, E. Bertagnolli, and H.D. Wanzenboeck (Vienna University of Technology)
17:40896 Effects of Nitrogen in HfO2 Gate Dielectric on the Electrical and Reliability Characteristics by N2 plasma - J.-H. Kim, K.-J. Choi, and S.-G. Yoon (Chungnam national university)

Coral Lounge, Level 6, Mid Pacific Conference Center

Thursday Evening Poster Session

Co-Chair: R. Singh

o897 Effects of the Wet Air on the Properties of the Lanthanum Oxide and Lanthanum Aluminate Films - J.H. Jun and D.J. Choi (Dept. of Ceramic Engineering, Yonsei University)
o898 Low-Frequency Noise in MOSFETs with La2O3 Gate Dielectrics. - J. Yoshida, K. Tsutsui, S.-I. Ohmi, and H. Iwai (Interdisciplinary Graduate School of Science and Engineering)