201st Meeting - Philadelphia, PA
May 12-17, 2002
PROGRAM INFORMATION
Q1 - Rapid Thermal And Other Short-Time Processing Technologies III
Electronics/Dielectric Science and Technology/High Temperature Materials Division
Monday, May 13, 2002
Salon E, Level 5
Advances in Short-Time Processing
Co-Chairs: F. Roozeboom and P.J. Timans
Time | Abs# | Title |
10:00 | 699 |
Clustered Single Wafer Wet Cleaning -
P.W. Mertens, F. Holsteyns, R. Vos, G. Vereecke, W. Fryen (IMEC), J. Lauerhaas
(Verteq Inc.), K. Xu, T. Bearda, I. Teerlinck, S. Arnauts, K. Kenis (IMEC),
M.O. Schmidt (Infinion), and M. Heyns (IMEC) |
10:30 | 700 |
Rapid Thermal Processing and the Engineering of Intrinsic Point Defect Profiles and Silicon Materials - R. Falster
(MEMC Electronic Materials) |
10:50 | 701 |
The Process of Innovation in Batch Furnaces - A.
Hasper, T. Claasen-Vujcic, and R. Noben (ASMI) |
11:20 | 702 |
Rapid Thermal Implant Annealing using Cold Wall and Hot Wall Systems -
W.S. Yoo, T. Fukada (WaferMasters, Inc.), T. Setokubo, K. Aizawa, J. Yamamoto (NEC Hiroshima Ltd.), and R. Komatsubara (Tokyo Electron Ltd.) |
11:40 | 703 |
Extremely Rapid Thermal Processing Using an Intense Hot Gas Stream - D. Bollinger and J. Callahan
(JETEK,Inc.) |
Advances in Short-Time Processing
Co-Chairs: F. Roozeboom and P.J. Timans
Time | Abs# | Title |
1:40 | 704 |
Thermal Technologies for sub-100nm CMOS Scaling - P.
Meissner, R. Thakur, J. Madok, G. Miner, L. Luo, and R. Achutheraman (Applied Materials) |
2:10 | 705 |
Low Temperature Borophosphosilicate Glass (BPSG) Process for High Aspect Ratio Gap Fill - M.
Belyansky, R. Conti, A. Upham, F. Liucci, and J. Strane (IBM Microelectronics Semiconductor) |
2:30 | 706 |
Progressive Furnace Process Technology for Advanced Gate Stack - Y. Tada (Tokyo Electron Limited) |
3:00 | 707 |
Plasma and UV Assisted Rapid Curing of Low-K Materials - C.
Waldfried, A. Margolis, O. Escorcia, Q. Han, R. Albano, and I. Berry (Axcelis Technologies, Inc.) |
3:20 | 708 |
The Selective Oxidation of Si(100) Versus W By H2O In Hydrogen - Y. Liu and J. Hebb
(Axcelis Technologies) |
3:40 | |
Thirty-Minute Intermission - |
Chemical Vapor Deposition in Short Time Processing Systems
Co-Chairs: M.C. Ozturk and P. Meissner
Time | Abs# | Title |
4:10 | 709 |
Manufacturability of SiGe:C Epitaxy for Heterojunction Bipolar Transistors integrated in a BiCMOS Technology - B.
Tillack, D. Knoll, Y. Yamamoto, B. Heinemann, K.-E. Ehwald, W. Winkler, and H. Ruecker
(IHP) |
4:40 | 710 |
Microloading Effect in RTCVD Reactors - O.
Gluschenkov, A. Chakravarti (IBM Microlectronics), I. McStay, and R. Malik (Infineon Technologies Corp.) |
5:00 | 711 |
Transient Transport and Reactant-Wafer Interactions: Adsorption and Desorption -
S.G. Webster, M.K. Gobbert (University of Maryland), V. Prasad, and T.S. Cale (Rensselaer Polytechnic Institute) |
5:20 | 712 |
Single-Wafer Hot Wall Rapid Thermal CVD of Silicon Nitride Films - Y.
Senzaki, C. Barelli, J. Sisson, Y. Brichko, R. Herring (ASML Thermal Division), J.-U.
Sachse, A. Morgenschweis, and J. Krujatz (Infineon Technologies) |
Tuesday, May 14, 2002
MOS Gate Stacks: High-K Dielectrics
Co-Chairs: D.L. Kwong and M.L. Green
Time | Abs# | Title |
8:00 | 713 |
Challenges and Opportunities in high-k Gate Dielectric Technology - M.
Niwa, Y. Harada, K. Yamamoto, S. Hayashi, R. Mitsuhashi, K. Eriguchi, M. Kubota (Matsushita Electric Industrial
Co.,Ltd.), Y. Hoshino, Y. Kido (Ritsumeikan University), and D.-L. Kwong (The University of Texas at Austin) |
8:30 | 714 |
Stability of Advanced Gate Stack Devices - I. Kim,
S.K. Han, and C. Osburn (North Carolina State University) |
8:50 | 715 |
Thermal Processing of High-K Materials Thermodynamics and Kinetics - E. Young, J. Chen, V.
Cosnier, P. Lysaght (International Sematech), J.W. Maes (ASM International), F. Roozeboom (Philips Research), and C. Zhao
(IMEC) |
9:20 | 716 |
Flat-band Voltage Study of High-K Dielectrics Subjected to Spike Thermal Annealing -
A.T. Fiory, V.R. Mehta, N.M. Ravindra (New Jersey Institute of Technology),
G.D. Wilk, T.W. Sorsch, and B. Busch (Agere Systems) |
9:40 | 717 |
Molecular Beam Deposition of Alternate Gate Dielectrics for Si CMOS. - S.
Guha, L.-A. Ragnarsson, and N. Bojarczuk (IBM) |
10:10 | 718 |
Effect of Post Metallization Annealing for Alternative Gate Stack Devices - I. Kim,
S.K. Han, and C. Osburn (North Carolina State University) |
10:30 | 719 |
In-line Electrical Metrology for High-k gate Dielectrics Deposited by Atomic Layer CVD - H. DeWitte
(ASM International), S. Passefort (KLA-Tencor Corporation), W. Besling (Philips Research),
J.W. Maes (ASM International), K. Eason (KLA-Tencor Corporation), E.W.A. Young (International
Sematech), and M. Heyns (IMEC) |
10:50 | |
Twenty-Five Minute Intermission - |
MOS Gate Stacks: Atomic Layer Deposition of High-K Dielectrics
Co-Chairs: E. Gusev and E.W.A. Young
Time | Abs# | Title |
1:40 | 720 |
Atomic Layer Deposition Technology for Advanced Gate Stack Engineering -
A.R. Londergan, S. Ramanathan, K. Vu, R. Hiznay, L. Matthysse, and T.E. Seidel (Genus, Inc.) |
2:10 | 721 |
Nucleation, Growth and Post Deposition Annealing of Atomic Layer Deposited (ALD) High-k Gate Dielectric Layers -
M.L. Green, G. Wilk, B. Busch (Agere Systems), and M.-Y. Ho (National University of Singapore) |
2:40 | 722 |
Atomic Layer Chemical Vapour Deposition of ZrO_2 Thin Films: Study of Growth Kinetics and Dielectric Behavior - A. Mane, A.
Chakraborty, D. M.S, V. Venkataraman, and S.A. Shivashankar (Indian Institute of Science) |
3:00 | |
Twenty-Five Minute Intermission - |
MOS Gate Stacks: MOCVD of High-K Dielectrics
Co-Chairs: E. Gusev and M. Niwa
Time | Abs# | Title |
3:25 | 723 |
High-k Dielectric Materials for Advanced CMOS Devices - L. Colombo,
M.R. Visokay, J.J. Chambers, A.L.P. Rotondaro, A. Shanware, M.J. Bevan, H. Bu, M. Douglas, L.
Tsung, and R. Kuan (Texas Instruments Inc) |
3:55 | 724 |
Effect of HfO_2 Deposition Rate on Interfacial Layer Thickness - F. Chen, R. Smith,
S.A. Campbell, and W.L. Gladfelter (University of Minnesota) |
4:15 | 725 |
Hf Cross-contamination in RTCVD System and Its Effect on Gate Oxide Integrity - J. Jeon (AMD), B.
Vermiere, H. Parks, S. Rhagavan (University of Arizona), F. Arasnia, and B. Ogle (AMD) |
MOS Gate Stacks: Alternative Gate Electrode Materials
Co-Chairs: E. Gusev and L. Colombo
Time | Abs# | Title |
4:35 | 726 |
NMOS Gate Electrode Selection Process for Advanced Silicon Devices - V.
Misra, Y.-S. Suh, H. Zhong, and G. Heuss (North Carolina State University) |
5:05 | 727 |
Chemical Vapor Deposition of Novel Precursors for Advanced Capacitor Electrodes - J. Peck, C. Hoover (Praxair, Inc.), J. Atwood, D. Hoth (State University on New York at Buffalo), S.
Consiglio, F. Papadatos, and E. Eisenbraun (New York Center for Advanced Thin Film Technology) |
Panel Discussion on High K Dielectrics
Co-Chairs: R. Arghavani and E. Gusev
Time | Abs# | Title |
5:25 | |
Panel Discussion on High-K Dielectrics - |
Wednesday, May 15, 2002
RTP Equipment: Temperature and Process Control
Co-Chairs: J.C. Gelpey and F. Roozeboom
Time | Abs# | Title |
8:00 | 728 |
Reflectance and Transmittance Measurements in a Mock-Up Rapid Thermal Processing Chamber - Y.-J. Shen, Q. Zhu, Z. Zhang (University of Florida), and P. Timans (Mattson Technology) |
8:20 | 729 |
Correlation between Hot Plate Emissivity and Wafer Temperature at Low Temperature - T. Murakami (WaferMasters Service Factory), T. Fukada, and W.S. Yoo (WaferMasters, Inc.) |
8:40 | 730 |
Pattern Effects in RTP: Still a Hidden World in Production? - Z. Nenyei (Mattson Thermal Products GmbH) |
9:10 | 731 |
Wafer Emissivity Effects on Light Pipe Radiometry in RTP Tools - K. Kreider, D. DeWitt, D. Chen, W. Kimes, C. Meyer, and B. Tsai (NIST) |
9:30 | 732 |
Emissivity Dependence of Spike Annealing in Levitor and Lamp-based Heating Systems - E. Granneman (ASM International), C. Laviron (LETI-CEA), A. Halimaoui (ST Microelectronics), V. Kuznetsov, R. Grisel, and H. Terhorst (ASM International) |
9:50 | 733 |
Wafer Processing in RTXTM RTP Chamber with Device Side Emissivity Measurement and Temeprature Control Paper, to be given orally at the ECS meeting in Philadelphia, PA on May 12-17, 2002 - I. Mahawili, S. Lineberry, and A. Davio (Micro C Technologies, Inc) |
10:20 | 734 |
Cutting-edge Temperature Measurement and Control Over a Wide Range of Process Temperatures in a 300 MM Hot-wall RTP System - J. Willis and J. Hebb (Axcelis Technologies, Inc.) |
10:40 | |
Thirty-Minute Intermission - |
Advanced Junctions by Ion Implantation and Thermal Annealing
Co-Chairs: P. Packan and A. Toriumi
Time | Abs# | Title |
1:40 | 735 |
Advanced Annealing for Sub-130nm Junction Formation - J. Gelpey, K. Elliott, D. Camm, S. McCoy, J. Ross (Vortek Industries, Ltd.), D.F. Downey, and E.A. Arevalo (Varian Semiconductor Equipment Associates) |
2:10 | 736 |
Solutions for Ultra Shallow Junctions - Improvements in spike anneal - B. Ramachandran, R. Boas, and S. Ramamurthy (Transistor Capacitor Group, Applied Materials Inc.) |
2:30 | 737 |
Stability of Ultra-Shallow Junction Formed by 0.2 keV Boron Implant and Spike Annealing - L. Shao (University of Houston), J. Bennett, L. Larsen (SEMATECH), X. Wang, I. Rosokova (University of Houston), J. Jing (Varian Semiconductor Equipment), H. Chen, J. Liu, and W.-K. Chu (University of Houston) |
2:50 | 738 |
Non-Destructive Therma-Prober Measurements of Annealed USJ Samples - M. Bakshi, L. Nicolaides, and S. Cherekdjian (Therma-Wave Inc.) |
3:20 | |
Twenty-Minute Intermission - |
3:50 | 739 |
Challenges in Transistor Scaling - P. Packan, M. Liu, and J. Hwang (Intel Corporation) |
4:20 | 740 |
Point Defect Engineering and Its Application on Ultra-shallow Junction Formation - W.-K. Chu, J. Liu, L. Shao (University of Houston), P. Thompson (Naval Research Laboratory), X. Wang, H. Chen (University of Houston), J. Bennett, and L. Larsen (Sematech) |
4:40 | 741 |
Influencing Transistor Parameters through Control of the Oxygen Ambient during Rapid Thermal Anneal - T. Riley, W. Bridgman, and D. Brown (Advanced Micro Devices) |
5:00 | 742 |
Measurement of Fermi Level Pinning at Si-SiO_2 Interfaces: Implications for TED in Spike Anneals - K. Dev and E. Seebauer (University of Illinois) |
5:20 | 743 |
Measurement of Nonthermal Illumination-Enhanced Diffusion in Silicon - M. Jung and E. Seebauer (University of Illinois) |
5:40 | 744 |
Silicon Carbide Doping by Ion Implantation and Excimer Laser Annealing - P. Boher, D. Zahorski (SOPRA), C. Dutto, and E. Fogarassy (Laboratoire CNRS-PHASE) |
Thursday, May 16, 2002
Alternative CMOS Source Drain Junction Technologies
Co-Chairs: R. Roy and F. Roozeboom
Time | Abs# | Title |
8:00 | 745 |
The Study of Boron Diffusion from Selective Epitaxial Grown Si1-xGex into Silicon after RTA - T.-H. Yang, E.Y. Chang, K.-M. Chen, H.-J. Huang (National Chiao Tung University), T.-Y. Yang (National Tatung University), and C.-Y. Chang (National Chiao Tung University) |
8:20 | 746 |
Ultra-Shallow Junctions in Si-{1-x}Ge-x Formed by Molecular-Beam Epitaxy - P. Thompson (Naval Research Laboratory) and J. Bennett (International SEMATECH) |
8:40 | 747 |
Ultra Shallow Junctions for Sub 0.1 Micron Technologies and Beyond - M. Mansoori, D. Mercer, A. Jain, and L. Robertson (Texas Instruments) |
9:10 | 748 |
Effects of Cl_2 on In-Situ Boron Doped Si1-xGex Source/Drain Junctions for CMOS Technology Nodes Beyond 30 nm - N. Pesovic and M. Ozturk (North Carolina State University) |
9:30 | 749 |
Laser Annealing for Ultra-shallow Junction Formation in Advanced CMOS - R. Surdeanu, Y. Ponomarev, R. Cerutti, B. Pawlak, C. Dachs, P. Stolk (Philips Research Leuven), M. Verheijen, M. Kaiser, M. Hopstaken, J. vanBerkum, F. Roozeboom (Philips Research Laboratories), L. Nanver (DIMES), I. Hoflijk, and R. Lindsay (IMEC) |
10:00 | |
Thirty-Minute Intermission - |
New Contact Technologies for Advanced CMOS
Co-Chairs: M. Mansoori and M.C. Ozturk
Time | Abs# | Title |
10:30 | 750 |
Integration of Source-drain Contacts into Emerging Future Generation CMOS Devices - R.A. Roy (IBM) |
11:00 | 751 |
Rapid Thermal Silicidation in Si, Si-Ge and SOI Devices - L.J. Chen (Department of Materials Science and Engineering, National Tsing Hua University) |
11:30 | 752 |
In Situ Monitoring of Thin Film Reactions during RTA: Nickel Silicide Formation. - C. Lavoie (IBM T.J. Watson Research Center), C. Coia (Ecole Polytechnique de Montreal), R. Purtell (IBM Microelectronics), P. Desjardins (Ecole Polytechnique de Montreal), J.L. Jordan-Sweet, C. Cabral, Jr., F.M. d'Heurle, and J.M.E. Harper (IBM T.J. Watson Research Center) |
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