214th ECS Meeting - Honolulu, HI |
October 12 - October 17, 2008 |
PROGRAM INFORMATION |
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E6 - Low k Inter-Level Metal Dielectrics and New Contact and Barrier Metallurgies/Structures |
Dielectric Science and Technology |
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Tuesday, October 14, 2008 |
Room 302B, Level 3, Hawaii Convention Center |
Conductor & Barrier Films and CMP |
| Co-Chair(s): G.S. Mathad and J. Flake |
| Time | Abs# | Title and Authors |
| 08:20 |
2060
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A New Leveler for Copper Interconnect Deposition in High Aspect-Ratio Trenches
H. Tsai, Y. Chang, P. Tsai (National Chiao Tung University) and P. Wu (National Chiao-Tung University)
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| 08:40 |
2061
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A Novel Fabrication of Cu-Mn Alloy Films by Chemical Displacement Process
L. Lin, Y. Wen-Luh and D. Ming-Jie (Feng-Chia University)
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| 09:00 |
2062
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Surface Treatments of the Plasma-Enhanced Atomic Layer Chemical Vapor Deposited TaNx Diffusion Barriers for Copper Metallization
C. Chang, C. Chen and F. Pan (National Chiao Tung University)
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| 09:20 |
2063
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High Rate Etching of Ru and TaN using Electrochemical Reaction for Bevel Cleaning
H. Aoki, D. Watanabe, N. Ooi, J. Jeong, C. Kimura and T. Sugino (Osaka University)
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| 09:40 |
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Intermission (20 Minutes)
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| 10:00 |
2064
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Controlling Scratching in Cu Chemical-Mechanical Planarization (CuCMP)
T. Eusner, N. Saka, J. Chun (MIT), S. Armini (IMEC), M. Moinpour and P. Fischer (Intel)
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| 10:20 |
2065
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The Effect of Hydrogen Plasma Treatment prior to Barrier Metal Deposition on Line-shaped Copper Missing Defect in Copper Dual Damascene Process
S. Kim, B. Lee, H. Lee, M. Lee, S. Oh, J. Hong and J. Han (Dongbu Hitek)
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Electro Migration 1 |
| Co-Chair(s): H. Rathore and G.S. Mathad |
| Time | Abs# | Title and Authors |
| 10:40 |
2066
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The Effect of a Threshold Failure Time on Electromigration Behavior of Copper Interconnects
R. G. Filippi, J. Lloyd (IBM Corporation), P. Wang (IBM), A. Brendler, J. Poulin (IBM Corporation), J. Demarest (IBM) and B. Redder (IBM Corporation)
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| 11:10 |
2067
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Blech Effect in Copper Interconnects, Its Applications and Design Considerations
P. Wang (IBM), R. G. Filippi (IBM Corporation), C. Christiansen, B. Li and H. Ding (IBM)
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| 11:40 |
2068
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Tensile and Compressive Failures of Cu/low-k Interconnect Trees
C. Thompson and F. Wei (MIT)
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Electro Migration 2 |
| Time | Abs# | Title and Authors |
| 13:40 |
2069
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Solder Bump Electromigration and CPI Challenges in Low k Devices
R. Susko, T. Daubenspeck, T. Wassick, T. Sullivan, W. Sauter and J. Cincotta (IBM)
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| 14:10 |
2070
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Effects of Grain Structure on Electromigration of Cu Interconnects
P. S. Ho (The University of Texas at Austin), E. Zschech, A. Meyer (AMD Saxony LLC & Co. KG, Center for Complex Analysis, Dresden, Germany), M. Hauschildt (Freescale Semiconductor Inc., Austin, TX) and M. Kraatz (The University of Texas at Austin, Microelectronics Research Center, Austn, TX)
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| 14:40 |
2071
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Enhanced Electromigration in Cu Interconnects Using Upper Level Dummy Vias
C. Hu (IBM T.J. Watson Research Center), S. Greco, P. McLaughlin, L. Gignac, E. Liniger, J. Demarest, E. Huang and C. Yang (IBM)
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| 15:10 |
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Intermission (20 Minutes)
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Low-k ILD Technologies |
| Co-Chair(s): J. Flake and G.S. Mathad |
| Time | Abs# | Title and Authors |
| 15:30 |
2072
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The Need for Ultra Low-k Dielectrics Based on Transistor Scaling - Callinan Award Presentation
P. A. Kohl (Georgia Institute of Technology)
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| 16:10 |
2073
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Extendibility of Cu/low-k/airgap BEOL
D. Edelstein (IBM Watson Research Center, Yorktown Heights, New York 10598 USA)
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| 16:40 |
2074
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Self-Assembly Based Air-Gap Integration
S. Ponoth (IBM), D. Horak (IBM Systems and Technology), S. Nitta, M. Colburn, G. Breyta (IBM Research), E. Huang (IBM), J. Sucharitaves, H. Landis, A. Lisi (IBM Systems and Technology), X. Liu (IBM Research), T. Vo (IBM Systems & Technology Group), R. Johnson, W. Li (IBM Systems and Technology), S. Purushothaman (IBM Research), S. Cohen (IBM Watson Research Center, Yorktown Heights, New York 10598 USA), C. Hu (IBM T.J. Watson Research Center), H. Kim (IBM Research), L. Clevenger (IBM Systems and Technology), N. Fuller, T. Nogami (IBM Research), T. Spooner (IBM Systems and Technology) and D. Edelstein (IBM Watson Research Center, Yorktown Heights, New York 10598 USA)
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| 17:10 |
2075
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Comparison Between Dielectric Properties of Airgap and ULK Interconnects
C. Guedj, V. Verriere, F. Gaillard (CEA LETI-Minatec), R. Gras (ST Microelectronics), E. Martinez (CEA-LETI), M. Sabardeil and J. Roux (Hamamatsu France)
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| 17:30 |
2076
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Lightly Porous SiCOH 2.7 Dielectric Film Development for 65/45/32 nm Advanced Nanoelectronic CMOS Devices
S. V. Nguyen (IBM Research at Albany Nanotech), V. McGahay (IBM Advanced Semiconductor Research and Development Center, Hopwell Junction, New York 12203 USA), M. Sherwood (IBM Almaden Research Center, San Jose, CA 95120 USA), N. Klymko (IBM Advanced Semiconductor Research and Development Center, Hopwell Junction, New York 12203 USA), S. Cohen, E. Simonyi, A. Grill (IBM Watson Research Center, Yorktown Heights, New York 10598 USA), H. Shobha (IBM Semiconductor R&D at Albany Nanotech, Albany, New York 12203), D. Restaino, S. Lane, S. Molis (IBM Semiconductor R&D Center, Hopwell Junction, New York 12533 USA), K. Malone (IBM Almaden Research Center, San Jose, CA 95120 USAI), E. Liniger (IBM), V. Patel, S. Gates, D. Edelstein (IBM Watson Research Center, Yorktown Heights, New York 10598 USA), S. Mehta (IBM Semiconductor R&D at Albany Nanotech, Albany, New York 12203) and T. Ivers (IBM Semiconductor R&D Center, Hopwell Junction, New York 12533 USA)
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