Honolulu PRiME 2012 - Honolulu, Hawaii

October 7 - October 12, 2012

PROGRAM INFORMATION
 

E8 - Processing Materials of 3D Interconnects, Damascene and Electronics Packaging 4
 

Monday, October 8, 2012

310, Level 3, Hawaii Convention Center

Challenges in Damascene and 3D Integration

Co-Chairs: K. Kondo and R. Akolkar
TimeProgr#Title and Authors
08:00   2715   Innovation Through Industry and University Collaboration S. Johnston (Intel Corporation)
08:40   2716   Heterogeneous 3D Stacking Technology Developments H. Ikeda (ASET)
09:10   2717   Metallization for 3D interconnect processing H. Philipsen, Y. Civale, K. Vandersmissen, M. Honore, F. Inoue, and P. Leunissen (IMEC)
 

Novel Processes for 3D Packaging

Co-Chairs: F. Roozeboom and M. Koyanagi
TimeProgr#Title and Authors
10:00   2718   3D Wafer Stacking via Bonding of Recessed Cu Damascene Structures C. Tan (Nanyang Technological University)
10:30   2719   3D Integration Technologies Based on Surface-Tension Driven Multi-Chip Self-Assembly Techniques T. Fukushima, K. Lee, J. Bea, T. Tanaka, and M. Koyanagi (Tohoku University)
11:00   2720   High Aspect Ratio Silicon Etch B. Wu (Applied Materials, Inc.)
11:30   2721   Through Silicon Via (TSV) Process Using DRIE and Cathode Coupled PE-CVD Y. Kusuda (SAMCO INC.)
 

Electrodeposition and Electroless Plating Advances

Co-Chairs: M. Hayase and G. Mathad
TimeProgr#Title and Authors
14:00   2722   Advances in Semiconductor Metallization Technologies for New Applications and Device Scaling R. Preisser (Atotech USA Inc.)
14:30   2723   Opportunities for Electroless Copper Deposition in Semiconductor Manufacturing Y. Dordi (Lam Research Corp)
15:00   2724   Cu Electroless Deposition on Ru Barrier - Investigation of Growth Phenomena and Film Properties K. Kim, T. Lim, K. Park, H. Koo, M. Kim, and J. Kim (Seoul National University)
15:20   2725   Control of Adhesion Strength and TSV Filling Morphology of Electroless Barrier Layer R. Arima, F. Inoue, H. Miyake, T. Shimizu, and S. Shingubara (Kansai University)
15:40   2726   The Wire Grid Polarizer made by Electro- and Electroless- Deposition Processes N. Okamoto, Y. Ikeda, Y. Koyama (Osaka Prefecture University), Y. Kawazu (Asahi Kasei E-materials Corp.), T. Saito, and K. Kondo (Osaka Prefecture University)
 

Tuesday, October 9, 2012

310, Level 3, Hawaii Convention Center

Electrochemical Processing for TSVs

Co-Chairs: R. Akolkar and P. Ramm
TimeProgr#Title and Authors
08:00   2727   Bath Stability Monitoring for Electroless Cu Seed Formation in High Aspect Ratio TSV F. Inoue (Kansai University), H. Philipsen, S. Armini, A. Radisic, Y. Civale, P. Leunissen (IMEC), and S. Shingubara (Kansai University)
08:20   2728   Via Filling Electrodeposotion of 4μm Diameter via by Periodical Reverse Current T. Hayashi, K. Kondo (Osaka Prefecture University), M. Takeuchi (Nittobo Medical Co., Ltd.), T. Saito, N. Okamoto (Osaka Prefecture University), M. Bunya (Nittobo Medical Co., Ltd.), and M. Yokoi (Osaka Prefecture University)
08:40   2729   The Effect of Polymer Additives on TSV Filling by Copper Electroplating C. Lin, W. Dow (National Chung Hsing University), J. Lin, W. Chang, and H. Lee (Industrial Technology Research Institute)
09:00   2730   Periodic Pulse Reverse Cu Electroplating for Through Hole Filling F. Shen, W. Dow (National Chung Hsing University), J. Lin, W. Chang, and H. Lee (Industrial Technology Research Institute)
09:20   2731   Copper-free Through Silicon Via Filling by Ni-W Electrodeposition H. Huang, W. Dow (National Chung Hsing University), J. Lin, W. Chang, and H. Lee (Industrial Technology Research Institute)
 

Electrochemical Processes for Damascene Interconnects

Co-Chairs: S. Shingubara and M. Hayase
TimeProgr#Title and Authors
10:00   2732   High Density Copper Nucleation on Ruthenium Using Commercial Plating Chemistry and Its Application to Metallization of High Aspect Ratio Through-Silicon Vias P. Shi (Atotech USA Inc.)
10:20   2733   Exploration of Process Window for Fill of Sub 30 nm Features by Direct Plating M. Nagar, A. Radisic (imec), K. Stubbe (Ghent University), and P. Vereecken (imec)
10:40   2734   The Impact of Electrolyte Acidity on Bottom-up Metallization of Copper Interconnects L. Boehme (Case Western Reserve University), J. Wu, X. Kang, R. Preisser (Atotech USA Inc.), and U. Landau (Case Western Reserve University)
11:00   2735   Temperature Effects on Additives Induced Polarization in Copper Electroplating of Interconnects L. Boehme and U. Landau (Case Western Reserve University)
11:20   2736   Effect of Additives on Direct Copper Electrodeposition on Transition Metal Diffusion Barriers for Silicon-based Integrated Devices B. Im and S. Kim (University of Ulsan)
11:40   2737   Superconformal Film Growth T. Moffat and D. Josell (National Institute of Standards and Technology)
 

Modeling and Characterization of Novel Interconnect Processes

Co-Chairs: K. Kondo and S. Shingubara
TimeProgr#Title and Authors
14:00   2738   Multi-Scale Modeling of Direct Copper Plating on Resistive Non-Copper Substrates L. Yang, A. Radisic, M. Nagar (imec), J. Deconinck (Vrije Universiteit Brussel), L. Leunissen, P. Vereecken (imec), and A. West (Columbia University)
14:20   2739   Synergistic Effects of Additives on the Filling Process of High-Aspect-Ratio TSV - Kinetic Monte Carlo Simulation - Y. Fukiage, Y. Kaneko (Kyoto University), K. Ohara, and F. Asa (C. Uyemura & Co., Ltd.)
14:40   2740   Ultrathin Copper Layers Deposited by Galvanic Displacement: Characterization by Atom Probe Tomography J. Ai, Y. Zhang, A. C. Hillier, and K. R. Hebert (Iowa State University)
15:00   2741   Simulation of Shape Evolution in Through-Mask Electrochemical Deposition G. J. Wilson, P. McHugh, S. Lee, and T. L. Ritzdorf (Applied Materials)
15:20   2742   Inverse Analysis of Accelerator Distribution for Through Silicon Via Filling M. Hayase, T. Matsuoka, K. Otsubo (Tokyo University of Science), Y. Onishi, and K. Amaya (Tokyo Institute of Technology)
15:40   2743   Cu Electroplating for Through Silicon Vias (TSVs) Filling Using a Dimensionally Stable Anode (DSA) W. Hsiung, W. Dow (National Chung Hsing University), J. Lin, W. Chang, H. Lee (Industrial Technology Research Institute), and S. Lin (Waste Recovery Technol)
16:00   2744   Lead Free Solder Deposited by ECD - Material Analysis T. L. Ritzdorf, S. Lee, and I. Drucker (Applied Materials)
16:20   2745   Evaluation of Grain Size Distributions of 50nm Wide Cu Interconnects by X-ray Diffraction Method T. Inami and J. Onuki (Ibaraki University)
16:40   2746   A Novel Synthesis Method of Cu Nanoparticles with High Stability and Their Applications Acting as Seed Layer of TSV C. Hsieh, W. Dow, and Y. Chang (National Chung Hsing University)
17:00   2747   Halide-Free Flux Activity at Copper and Tin Surface S. Vegunta, G. Qu, K. Mai, J. Nguyen, and J. Flake (Louisiana State University)
17:20   2748   Investigation of the Mechanism of Cu Eruption-Induced Copper Void Defects in Memory Applications. K. Chung, J. Park, T. Yoon, G. Oh, D. Park, S. Kim, D. Im, D. Lee, J. Kim, M. Park, D. Kim, Y. Chung, J. Baek, S. Kwon, H. Jeong, J. Kim, S. Nam (Samsung Electronics Co., LTD), H. Kang (Samsung Electronics Co., Ltd.), and C. Chung (Samsung Electronics Co., LTD)
17:40   2749   Failure Mechanism of Copper Through-Silicon Vias Under Biased Thermal Stress S. Seo, J. Hwang (Sejong University), J. Yang (National NanoFab Center), and W. Lee (Sejong Univ.)
 

Wednesday, October 10, 2012

310, Level 3, Hawaii Convention Center

Plasma Processes for Barriers and Dielectrics

Co-Chairs: G. Mathad and R. Akolkar
TimeProgr#Title and Authors
08:00   2750   Stability of Glassy Ta-Rh Diffusion Barriers for Cu Metallization N. Dalili, Q. Liu, and D. Ivey (University of Alberta)
08:20   2751   Investigation of Tetrahedral Amorphous Carbon (ta-C) as Diffusion Barrier for Advanced Cu Metallization Technology X. Ma, H. Yin, Z. Fu (Institute of Microelectronics of Chinese Academy of Sciences), X. Zhang (Key Laboratory of Beam Technology and Material Modification of Ministry of Education, Beijing Normal University), K. Du (Shenyang National Laboratory for Materials Science, Institute of Metal Research of Chinese Academy of Sciences), J. Yan (Institute of Microelectronics of Chinese Academy of Sciences), C. Zhao, D. Chen, and T. Ye (Chinese Academy of Sciences)
08:40   2752   Positive-Tone, Aqueous-Developable, Polynorbornene Dielectric B. K. Mueller, A. Grillo (Georgia Institute of Technology), E. Elce (Promerus LLC), and P. Kohl (Georgia Institute of Technology)
09:00   2753  
CANCELLED
Ladder-like Polymethylsilsesquioxane (PMSQ) for Interlayer Dielectric (ILD) Application H. Lee, S. Hwang, and K. Baek (Korea Institute of Science and Technology (KIST))
09:20   2754   Effect of Thermal Treatment on Physical, Electrical Properties and Reliability of Porogen-Containing and Porogen-Free Ultralow-k Dielectrics Y. Cheng, W. Chang, Y. Chang, and J. Leu (National Chi-Nan University)
 

Novel Systems Approaches

Co-Chairs: M. Koyanagi and M. Hayase
TimeProgr#Title and Authors
10:00   2755   System-in-Package concept for a Carbon Nanotube resonator R. Gueye (Sensors Actuators and Microsystems Laboratory (SAMLAB) EPFL), S. Lee (Micro and Nanosysems Laboratory, ETHZ), T. Akiyama (The Sensors Actuators and Microsystems Laboratory (SAMLAB), Ecole Polytechnique Fédérale de Lausanne (EPFL)), D. Briand (EPFL Lausanne), M. Muoh, C. Roman, C. Hierold (Micro and Nanosysems Laboratory, ETHZ), and N. De Rooij (EPFL Lausanne)
10:20   2756   Concept of Spatially Divided Deep Reactive Ion Etching of Si using Oxide Atomic Layer Deposition in the Passivation Cycle F. Roozeboom (Eindhoven University of Technology), B. Kniknie, R. Knaapen, M. Smets, A. Illiberi, P. Poodt (TNO, Eindhoven, Netherlands), G. Dingemans, W. Keuning, and W. Kessels (Eindhoven University of Technology)
10:40   2757   Adhesion Reliability Enhancement of Silicon/Epoxy/Polyimide Interfaces for Flexible Electronics S. Kim and T. Kim (KAIST)
11:00   2758   The Effects of Levelers on Copper Via Filling in 3D SiP M. Jung, K. Kim, and J. LEE (Hongik University)
11:20   2759   Direct Measurement and Enhancement of Adhesion Energy of Bi-Te Thermoelectric Thin Films C. Kim (KAIST), S. Jeon, H. Lee (Sungkyunkwan University), S. Hyun (Korea Institute of Machinery and Materials), and T. Kim (KAIST)